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Since those early days SystemC has been adopted as the language of choice for high level synthesis, connecting the design modeling and virtual prototype application domains with the functional verification and automated path gate level implementation. This offers project teams the ability to produce one model for multiple purposes. At the 2010 DVCon event, OSCI produced a specification of the first synthesizable subset of SystemC for industry standardization.
===TLM 1.0 Standardization (2005)===
The first standardized TLM methodology, known as '''TLM-1.0''', was released by OSCI in 2005.<ref name="TLM_1_0_Release">{{cite press release |title=OSCI Releases Transaction Level Modeling Standard |publisher=Open SystemC Initiative |date=2005-06-15}}</ref> TLM-1.0 introduced fundamental concepts including:
* Basic transaction interfaces for communication
* [[FIFO]] and signal-based communication channels
* Simple request-response transaction protocols
* Basic timing annotations
The TLM-1.0 standard was primarily focused on functional modeling and provided limited support for detailed timing analysis.<ref name="Ghenassia_TLM_1">{{cite book |title=Transaction-Level Modeling with SystemC: TLM Concepts and Applications for Embedded Systems |editor=Ghenassia, Frank |publisher=Springer |year=2005 |chapter=TLM-1.0 Standard |pages=87-124 |isbn=978-0-387-26233-4}}</ref>
===TLM 2.0 Evolution and IEEE Standardization (2008-2011)===
'''TLM-2.0''', released in 2008, represented a major advancement in transaction-level modeling methodology.<ref name="TLM_2_0_Release">{{cite press release |title=OSCI Releases TLM-2.0 Standard for Transaction-Level Modeling |publisher=Open SystemC Initiative |date=2008-06-10}}</ref> The new standard introduced several key innovations:
* Generic payloads for standardized transaction representation
* Multiple timing models (untimed, loosely timed, approximately timed)
* Standardized socket interfaces for interoperability
* Enhanced debugging and analysis capabilities<ref name="Aynsley_TLM2">{{cite book |title=ASIC and FPGA Verification: A Guide to Component Modeling |author=Aynsley, John |publisher=Springer |year=2009 |chapter=TLM-2.0 Reference |pages=145-198 |isbn=978-1-4419-0564-5}}</ref>
TLM-2.0 was subsequently incorporated into the [[IEEE]] 1666-2011 standard for SystemC, providing official recognition and broader industry acceptance.<ref name="IEEE_1666_2011">{{cite standard |title=IEEE Standard for Standard SystemC Language Reference Manual |standard=IEEE Std 1666-2011 |publisher=IEEE |year=2012 |doi=10.1109/IEEESTD.2012.6134619}}</ref>
==Key Concepts==
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