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*[[Java Optimized Processor]] for [[FPGA]]s. A PhD thesis is [http://www.jopdesign.com/thesis/index.jsp available]
*[http://shap.inf.tu-dresden.de/ SHAP] bytecode processor from the TU Dresden
*[http://www.ee.cityu.edu.hk/~hisc/architecture.html jHISC] provides hardware support for object-oriented functions, as described in a [http://dx.doi.org/10.1016/j.micpro.2005.12.007 Microprocessors and Microsystems] article
[[Category:Java virtual machine]]
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