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{{AFC submission|||ts=20100315074724|u=Appusom|ns=5}} <!--- Important, do not remove this line before article has been created. --->
'''Computing with Memory''' refers to computing platforms where function response is stored in memory array, either one or two-dimensional, in the form of lookup tables (LUTs) and functions are evaluated by retrieving the values from the LUTs. These computing platforms can follow either a purely spatial computing model, as in '''''[[Field-programmable gate array]]''''' (FPGA), or a temporal computing model, where a function is evaluated across multiple clock cycles. The latter approach aims at reducing the overhead of programmable interconnect in FPGA by folding interconnect resources inside a computing element. It uses dense two-dimensional memory arrays to store large multiple-input multiple-output LUTs. '''''Computing with Memory''''' differs from '''''Computing in Memory''''' or [[Processor-in-memory]] (PIM) concepts, widely investigated in the context of integrating a processor and memory on the same chip to reduce the memory bandwidth and latency. These architectures seek to reduce the distance the data travels between the processor and the memory. Berkeley [http://iram.cs.berkeley.edu/ IRAM] project is one notable contribution in the area of PIM architectures.
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<ref name="Ref 8"> S. Paul, S. Chatterjee, S. Mukhopadhyay and S. Bhunia, "Nanoscale Reconfigurable Computing Using Non-Volatile 2-D STTRAM Array", International Conference on Nanotechnology, 2009.</ref>
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