Revision as of 20:58, 16 December 2009 edit SmackBot (talk \| contribs) 3,734,324 edits m remove Erik9bot category,outdated, tag and general fixes ← Previous edit		Revision as of 00:19, 1 April 2010 edit undo 192.102.209.29 (talk) No edit summary Next edit →
Line 12: In Windows, this has IRQL as 29. In [[x86 architecture\|x86]] based systems, an IPI synchronizes the cache and [[~~Memory~~memory ~~Management~~management ~~Unit~~unit]] (MMU) between processors. ==See also==

Inter-processor interrupt: Difference between revisions