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The major innovations of Tomasulo’s algorithm include [[register renaming]] in hardware, [[reservation station|reservation stations]] for all execution units, and a common data bus (CDB) on which computed values broadcast to all reservation stations that may need them. These developments allow for improved [[parallel computing|parallel execution]] of instructions that would otherwise stall under the use of [[scoreboarding]] or other earlier algorithms.
Robert Tomasulo received the [[
| url =http://awards.acm.org/award_winners/tomasulo_4008463.cfm
| title =Robert Tomasulo – Award Winner
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===Exceptions===
Practically speaking, there may be exceptions for which not enough status information about an exception is available, in which case the processor may raise a special exception, called an "imprecise" exception.
Programs that experience "precise" exceptions, where the specific instruction that took the exception can be determined, can restart or re-execute at the point of the exception. However, those that experience "imprecise" exceptions generally cannot restart or re-execute, as the system cannot determine the specific instruction that took the exception.
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===Stage 2: execute===
In the execute stage, the instruction operations are carried out.
*If one or more of the operands is not yet available then: wait for operand to become available on the CDB.
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