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{{Short description|Type of computer benchmarking tool}}
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{{Infobox Softwaresoftware
 
{{Infobox Software
|name=PARSEC Benchmark Suite
|logo=[[File:parsec-logo.png|300px]]
|author=[[Princeton University]] and [[Intel]]
|developer=[[Christian Bienia]]
|releasereleased=[[January 25, 2008]]
|latest release version=2.1
|latest release date=[[August 13, 2009]]
|programming language=[[C/C++]]
|operating system = [[Linux]], [[OpenSolaris]]
|status=Active
|genre = [[Benchmark (computing)|Benchmark]]
|license = [[open3-sourceclause BSD]]
|website=http://{{URL|parsec.cs.princeton.edu/}}
}}
The '''Princeton Application Repository for Shared-Memory Computers''' (PARSEC) is a [[Benchmark (computing)|benchmark suite]] composed of multithreadedmulti-threaded emerging workloads that is used to evaluate and develop next-generation [[multi-core processor|chip-multiprocessors]]. It was collaboratively created by [[Intel]] and [[Princeton University]] to drive research efforts on future computer systems.<ref name="ednnews">{{cite web
 
The Princeton Application Repository for Shared-Memory Computers (PARSEC) is a [[Benchmark (computing)|benchmark suite]] composed of multithreaded emerging workloads that is used to evaluate and develop next-generation [[multi-core processor|chip-multiprocessors]]. It was collaboratively created by [[Intel]] and [[Princeton University]] to drive research efforts on future computer systems.<ref name="ednnews">{{cite web
|title=Intel Teams with Universities on Multicore Software Suite
|url=http://www.edn.com/article/CA6364657.html
|publisher=EDN
|accessdateaccess-date=2006-08-22
|archive-url=https://archive.today/20130123055848/http://www.edn.com/article/CA6364657.html
}}</ref><ref name="mattsonblog">{{cite web
|archive-date=2013-01-23
|title=Designing future computers with future workloads
|url-status=Activedead
|url=http://blogs.intel.com/research/2008/02/designing_future_computers_wit.php
}}</ref><ref name="mattsonblog">{{Cite web |url=http://blogs.intel.com/research/2008/02/designing_future_computers_wit.php |title=Designing future computers with future workloads |publisher=Research@Intel |access-date=2008-02-26 |archive-date=2008-09-06 |archive-url=https://web.archive.org/web/20080906112505/http://blogs.intel.com/research/2008/02/designing_future_computers_wit.php |url-status=dead }}</ref> Since its inception the benchmark suite has become a community project that is continued to be improved by a broad range of research institutions.<ref name="gabeweb">{{Cite web |url=http://www.gabeoneda.com/node/39 |title=Intel CTO looks into the future: Measuring the value and need for multi-core |publisher=Gabe on EDA |access-date=2006-08-31 |archive-date=2008-04-08 |archive-url=https://web.archive.org/web/20080408210713/http://www.gabeoneda.com/node/39 |url-status=dead }}</ref> PARSEC is freely available and is used for both academic and non-academic research.<ref name="parsecweb">{{Cite web |url=http://parsec.cs.princeton.edu/ |title=The PARSEC Benchmark Suite |publisher=Princeton University |access-date=2008-01-05}}</ref><ref name="bhadauria09parsec">{{Citation |title=Proceedings of the 2009 IEEE International Symposium on Workload Characterization |date=October 2009 |last1=Bhadauria |last2=Weaver |last3=McKee |first1=Major |first2=Vincent M. |first3=Sally A. |contribution=Understanding PARSEC Performance on Contemporary CMPs |contribution-url=http://www.iiswc.org/iiswc2009/ |publisher=IEEE}}</ref><ref name="barrowwilliams09parsec">{{Citation |title=Proceedings of the 2009 IEEE International Symposium on Workload Characterization |date=October 2009 |last1=Barrow-Williams |last2=Fensch |last3=Moore |first1=Nick |first2=Christian |first3=Simon |contribution=A Communication Characterization of SPLASH-2 and PARSEC |contribution-url=http://www.iiswc.org/iiswc2009/ |publisher=IEEE}}</ref>
|publisher=Research@Intel
|accessdate=2008-02-26
}}</ref> Since its inception the benchmark suite has become a community project that is continued to be improved by a broad range of research institutions.<ref name="gabeweb">{{cite web
|title=Intel CTO looks into the future: Measuring the value and need for multi-core
|url=http://www.gabeoneda.com/node/39
|publisher=Gabe on EDA
|accessdate=2006-08-31
}}</ref> PARSEC is freely available and is used for both academic and non-academic research.<ref name="parsecweb">{{cite web
|title=The PARSEC Benchmark Suite
|url=http://parsec.cs.princeton.edu/
|publisher=Princeton University
|accessdate=2008-01-05
}}</ref><ref name="bhadauria09parsec">{{Citation
|last1=Bhadauria|first1=Major
|last2=Weaver|first2=Vincent M.
|last3=McKee|first3=Sally A.
|contribution=Understanding PARSEC Performance on Contemporary CMPs
|contribution-url=http://www.iiswc.org/iiswc2009/
|title=Proceedings of the 2009 IEEE International Symposium on Workload Characterization
|publisher=IEEE
|year=October 2009
}}</ref><ref name="barrowwilliams09parsec">{{Citation
|last1=Barrow-Williams|first1=Nick
|last2=Fensch|first2=Christian
|last3=Moore|first3=Simon
|contribution=A Communication Characterization of SPLASH-2 and PARSEC
|contribution-url=http://www.iiswc.org/iiswc2009/
|title=Proceedings of the 2009 IEEE International Symposium on Workload Characterization
|publisher=IEEE
|year=October 2009
}}</ref>
 
== MotivationBackground ==
 
WithThe the emergenceintroduction of chip-multiprocessors required computer manufacturers wereto facedrewrite withsoftware afor problem:the Thefirst time to take advantage of parallel processing capabilities, including rewriting newexisting technologysystems causedfor atesting disruptiveand changedevelopment.<ref name="mattsonblog"/><ref name="rabaey08future">{{Citation
|last1=Rabaey
|first1=Jan M.
|last2=Burke
|first2=Daniel
|last3=Lutz
|first3=Ken
|last4=Wawrzynek
|first4=John
|contribution=Workloads of the Future
|contribution-url=http://www2.computer.org/cms/Computer.org/ComputingNow/homepage/0908/WorkloadsoftheFuture.pdf
|title=IEEE Design & Test of Computers
|publisher=IEEE
|yeardate=July / AugustJuly–August 2008
|access-date=2010-02-12
}}</ref> For the first time in computer history software would have to be rewritten in order to take advantage of the parallel nature of those processors, which means that existing programs could not be used effectively to test and develop those new types of computer systems. At that time parallel software only existed in very specialized areas. However, before chip-multiprocessors became commonly available software developers were not willing to [[Parallelization|rewrite]] any mainstream programs, which means hardware manufacturers did not have access to any programs for test and development purposes that represented the expected real-world program behavior accurately. This posed a hen-and-egg problem that motivated a new type of benchmark suite with parallel programs that could take full advantage of chip-multiprocessors.
|archive-date=2011-08-07
|archive-url=https://web.archive.org/web/20110807224952/http://www2.computer.org/cms/Computer.org/ComputingNow/homepage/0908/WorkloadsoftheFuture.pdf
|url-status=dead
}}</ref> For the first time in computer history software would have to be rewritten in order to take advantage of the parallel nature of those processors, which means that existing programs could not be used effectively to test and develop those new types of computer systems. At that time parallel software only existed in very specialized areas. However, before chip-multiprocessors became commonly available software developers were not willing to [[Parallelization|rewrite]] any mainstream programs, which means hardware manufacturers did not have access to any programs for test and development purposes that represented the expected real-world program behavior accurately. This posed a hen-and-egg problem that motivated a new type of benchmark suite with parallel programs that could take full advantage of chip-multiprocessors.
 
PARSEC was created to break this circular dependency. It was designed to fulfill the following five objectives: <ref name="bienia08parsec">{{Citation
|last1=Bienia|first1=Christian
|last2=Kumar|first2=Sanjeev
Line 80 ⟶ 56:
|title=Proceedings of the 17th international conference on Parallel architectures and compilation techniques
|publisher=Association for Computing Machinery, New York, NY, USA
|yeardate=October 2008
}}</ref>
 
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# The suite supports research
 
Traditional benchmarks that were publicly available before PARSEC were generally limited in their scope of included application domains or typically only available in an unparallelized, serial version. Parallel programs were only prevalent in the ___domain of [[High-Performance Computing]] and on a much smaller scale in business environments.<ref name=parsec_splash_comparison>{{Cite book | last1 = Bienia | first1 = C. | last2 = Kumar | first2 = S. | last3 = Kai Li | doi = 10.1109/IISWC.2008.4636090 | chapter = PARSEC vs. SPLASH-2: A quantitative comparison of two multithreaded benchmark suites on Chip-Multiprocessors | title = 2008 IEEE International Symposium on Workload Characterization | pages = 47 | year = 2008 | isbn = 978-1-4244-2777-2 | s2cid = 1805881 }}</ref> [[multi-core processor|Chip-multiprocessors]] however were expected to be heavily used in all areas of computing such as with parallelized consumer applications.
 
== Workloads ==
 
The PARSEC Benchmark Suite is available in version 2.1, which includes the following workloads: <ref name="bienia09parsec2">{{Citation
|last1=Bienia|first1=Christian
|last2=Li|first2=Kai
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|title=Proceedings of the 5th Annual Workshop on Modeling, Benchmarking and Simulation
|publisher=Association for Computing Machinery, New York, NY, USA
|yeardate=June 2009
}}</ref>
 
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<!-- NOTE: YOUR ARTICLE MUST BE SUBMITTED WITH AT LEAST TWO "SUITABLE REFERENCES" TO BE ACCEPTED. -->
 
{{Reflist}}
<references/>
 
 
=== External Links ===
 
=== External Links =links==
* [http://parsec.cs.princeton.edu/ The PARSEC Benchmark Suite]
* [http://wiki.cs.princeton.edu/index.php/PARSEC The PARSEC Wiki]
 
[[Category:ComputerBenchmarks benchmarks(computing)]]
[[Category:Evaluation of computers]]