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Guy Harris (talk | contribs) →Many dubious and unsourced claims: Neither the Patterson/Ditzel "case for RISC" paper nor the 6th edition of H&P define RISC or CISC - the 6th edition of H&P doesn't even mention those terms. |
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::So that paper could be considered a ''reliable'' source, but not a source very useful for the goal of clearly defining RISC or CISC.
::And the 6th edition of a book John Hennessy co-wrote with another researcher :-) doesn't, as I noted in [https://en.wikipedia.org/w/index.php?title=Complex_instruction_set_computer&diff=1161013939&oldid=1160988640 this edit], use the terms "RISC" or "CISC", so it may be more of a case of "RISC: tired, load-store architecture: wired" abd "CISC: tired, non-load-store architecture: wired" now. [[User:Guy Harris|Guy Harris]] ([[User talk:Guy Harris|talk]]) 06:36, 24 June 2023 (UTC)
:::Yes, that's the point. RISC and CISC were vague terms in the 1980s and 1990s with multiple contradictory definitions. Since then, advances in computer architectures has made the terms less relevant and the definitions mostly meaningless.
:::As Steve Furber (co-designer of ARM) said in ''VLSI RISC Architecture and Organization'', "A Reduced Instruction Set Computer (RISC) is a member of an ill-defined class of computing machines. The common factor which associates members of the class is that they all have instruction sets which have been optimized more towards implementation efficiency than members of the alternative class of Complex Instruction Set Computers (CISCs), where the optimization is towards the minimization of the semantic gap between the instruction set and one or more high-level languages."
:::On the other hand, Blaau and Brooks say in ''Computer Architecture'', "An architecture in which most, if not all, operations can be implemented in a single datapath action and that has few constructs is called a reduced instruction-set computer (RISC). Early examples are STC ZEBRA, DEC PDP8, and first generation microprocessors such as the Intel 8008 and Motorola 6800."
:::And then you have the extremely quantitative definitions such as Tabak in ''RISC Architecture'':
:::1. Relatively low number of instructions, desirably less than 100
:::2. Low number of addressing modes, desirably 1 or 2
:::3. Low number of instruction formats, desirably 1 or 2, all of the same length
:::4. Single cycle execution of all instructions
:::5. Memory access performed by load/store only;
:::6. Relatively large register set, over 32, most operations register-to-register
:::7. Hardwired control unit (may be microprogrammed as technology develops)
:::8. Effort to support High Level Language operations
:::Thus, one has to accept that RISC and CISC never had nice, clean definitions and describe that with a [[WP:NPOV]] rather than trying to invent the One True Definition.
:::[[User:KenShirriff|KenShirriff]] ([[User talk:KenShirriff|talk]]) 18:03, 24 June 2023 (UTC)
::::BTW, [http://www.righto.com/2023/07/the-complex-history-of-intel-i960-risc.html your post on the 960] pointed to [https://yarchive.net/comp/risc_definition.html this sequence of John Mashey comp.arch posts], which is somewhat relevant here. Mashey seems to lean towards "CISC means 'not RISC'", and thinks talking about many older CPUs as "CISC" or "RISC" isn't a useful execise.
::::That's a sequence from 1992, from an era before the "throw a bunch of simple operations into a bucket and run them superscalar and out-of-order - which may involve chopping complex instructions into muliple simple operations" stuff, so it'd be interesting to see what he'd say now.
::::And the two CISC ISAs he seemed to put in the "relatively simple, as CISCs go" bucket 1) are the two remaining CISCs from that paper, 2) have a ton of money behind them (PC x86 processors and IBM mainframes), and 3) appear now to have implementations in the "throw a bunch of simple operations into a bucket and..." camp. [[User:Guy Harris|Guy Harris]] ([[User talk:Guy Harris|talk]]) 22:53, 2 July 2023 (UTC)
== Combine CISC page with RISC? ==
I've been thinking that it would make sense to merge the CISC page into the RISC page. The problem is that the RISC and CISC page have a lot of overlap and mostly cover the same history and information, so they are largely redundant (when they aren't contradictory). As [[WP:OVERLAP]] says, "Remember, that Wikipedia is not a dictionary; there does not need to be a separate entry for every concept. For example, "flammable" and "non-flammable" can both be explained in an article on flammability."
I'm not saying that CISC is unimportant, of course. But since CISC is essentially defined in opposition to RISC, you can't really discuss one without the other. I think that combining the pages would improve both of them. Comments? [[User:KenShirriff|KenShirriff]] ([[User talk:KenShirriff|talk]]) 20:15, 4 December 2023 (UTC)
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