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{{Redirect|OVM}}
The '''Open Verification Methodology''' (OVM) is a documented [[methodology]] with a supporting building-block library for the verification of semiconductor chip designs. The initial version, OVM 1.0, was released in January, 2008,<ref>[http://www.ovmworld.org/press_release_010908.php OVM 1.0 Announcement]</ref>
The reuse concepts within the OVM were derived mainly from the
==References==
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{{Reflist}}
==External links==
* [http://www.edaplayground.com EDA Playground] - run OVM simulations from a web browser (free online IDE)
*[http://www.accellera.org/activities/vip/VIP-TC_standard_effort_update_Jan_2010.pdf OVM Relationship to the UVM]
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