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== Overview ==
 
The bus-invert encoding technique uses an extra signal (INV) to indicate the "polarity" of the data. Having a bus-invert code word INV@x where @ is the concatenation operator and x denotes either the source word or its [[ones' complement]], the bus-invert decoder takes the code word and produces the corresponding source word. If the INV signal is 1, the result is oneones's complement of x, otherwise it is x.
 
=== Usage scenarios===
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== Performance analysis ==
The bus-invert method generates a code that has the property that the maximum number of transitions per time-slot is reduced from n to n/2+1 and thus the peak power dissipation for [[input/output]] (I/O) is reduced by nearly the half. From the [[coding theory]] point of view, the bus-invert code is a time-dependent Markovian code.
 
While the maximum number of transitions is reduced by half, the average number has a smaller decrease. For an 8-bit bus for example, the average number of transitions, using bus-invert coding becomes 3.27 (instead of 4), or 0.41 (instead of 0.5) transitions per bus-line per time-slot. This means that the average number of transitions is 81.8% of the number with an unencoded bus. This is because the invert line contributes some transitions and the distribution of the Hamming distances is not uniform.<ref name="Stan_1995"/>
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== References ==
{{Reflist|refs=
<ref name="Stan_1995">{{cite journal |author-first1=Mircea R. |author-last1=Stan |author-first2=Wayne P. |author-last2=Burleson |title=Bus-Invert Coding for Low-Power I/O |journal=IEEE Transactions Onon Very Large Scale Integration (VLSI) Systems |volume=3 |number=1 |pages=49-5849–58 |date=March 1995 |id=1063-8210/95$04.00 |url=http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.89.2154&rep=rep1&type=pdf |access-date=2018-07-08 |url-status=live |archive-url=https://web.archive.org/web/20180708204233/http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.11109/92.1.89.2154&rep=rep1&type=pdf365453 |archive-date=2018-07-08}}</ref>
}}
 
==Further reading==
* {{cite book |author-first=Vincent C. |author-last=Gaudet |chapter=Chapter 4.1. Low-Power Design Techniques for State-of-the-Art CMOS Technologies |editor-first=Bernd |editor-last=Steinbach |editor-link=:de:Bernd Steinbach |title=Recent Progress in the Boolean Domain |publisher={{ill|[[Cambridge Scholars Publishing|wikidata|Q27903803}}]] |___locationpublication-place=Newcastle upon Tyne, UK |___location=Freiberg, Germany |edition=1 |date=2014-04-01 |orig-yeardate=2013-09-25 |isbn=978-1-4438-5638-6 |pages=187-212187–212 |url=https://books.google.com/books?id=_pwxBwAAQBAJ |access-date=2019-08-04}} [https://mweb.archive.org/web/20210228020207/https://www.tau.ac.il/~ilia1/publications/rpbd_book.pdf<!-- https://m.tau.ac.il/~ilia1/publications/rpbd_book.pdf draft version 2013-09-25 -->] (455xxx+428 pages)
 
[[Category:Electronics optimization]]