Universal synchronous and asynchronous receiver-transmitter: Difference between revisions

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[[File:USART.png | thumb | right | alt=An example of a USART | An example of a USART]]A Universal'''universal Synchronous/Asynchronoussynchronous Receiver/Transmitterand asynchronous receiver-transmitter''' ('''USART''', '''programmable communications interface''' or '''PCI''')<ref>{{Cite web |date=2017-12-04 |title=8251A-Programmable Communication Interface Notes - Computer Science Engineering (CSE) |url=https://edurev.in/studytube/8251A-Programmable-Communication-Interface-Micropr/75b44fe5-ea73-4bc7-88e4-4a74b1f65084_t |access-date=2022-07-02 |website=EDUREV.IN |language=en}}</ref> is a type of a serial interface device that can be programmed to communicate asynchronously or synchronously. See [[UARTuniversal asynchronous receiver-transmitter]] (UART) for a discussion of the asynchronous capabilitycapabilities of thisthese devicedevices.

== Purpose and history ==

The USART's synchronous capabilities were primarily intended to support synchronous protocols like IBM's [[SDLCsynchronous transmit-receive]] (STR), [[Binary Synchronous Communications|binary synchronous communications]] (BSC), [[synchronous data link control]] (SDLC), and the ISO-standard [[HDLCHigh-Level Data Link Control|high-level data link control]] (HDLC) synchronous link-layer protocols, which were used with synchronous voice-frequency modems[[modem]]s. These protocols were designed to make the best use of bandwidth while transmitting blocks of data when modems were analog devices. In those times, the fastest asynchronous voice-band modem could achieve at most speeds of 300{{nbsp}}bit/s using [[frequency-shift keying]] (FSK) bpsmodulation, while synchronous modems could run at speeds up to 9600{{nbsp}}bit/s bps.using [[phase-shift Inkeying]] addition,(PSK). synchronousSynchronous transmission used only slightly over 80% of the bandwidth of the now more-familiar asynchronous transmission, since start and stop bits were unnecessary. Those modems are entirely obsolete, having been replaced by modems which convert asynchronous data to synchronous forms, but similar synchronous telecommunications protocols survive in numerous block-oriented technologies, includingsuch as the widely- used [[IEEE 802.2]] (Ethernet) link-level protocol. AnUSARTs exampleare ofstill asometimes USARTintegrated waswith theMCUs. [[IntelUSARTs 8251]].are still USART's,used thoughin apparentlyrouters nothat longerconnect manufacturedto asexternal standaloneCSU/DSU componentsdevices, areand they often integrateduse witheither MCUs.Cisco's proprietary (DoesHDLC anyoneimplementation knowor ifthe any[[Internet currentEngineering protocolTask implementationsForce|IETF]] relystandard on[[point-to-point HDLCprotocol]] or(PPP) SDLCin HDLC-like framing?) as defined in RFC{{nbsp}}1662.

== Operation ==

A synchronous line is never silent; data was always flowing. When the USART has nothing to transmit in synchronous mode, it sends a continuous stream of ''flag characters''.

The operation of a USART is intimately related to the various protocols; refer to those pages for details. This section only provides a few general notes.

* USARTs in synchronous mode transmittransmits data in [[Frame (networking) |frames]], which are delimited by flag characters. The flag character is only transmitted as a frame delimiter; any flag characters in data are carefully transformed on transmission by the addition of bits (bit stuffing), a process which is reversed on reception. Control and data characters are then sent continuously without start and stop bits. At the end of frames, a [[frame check sequence]] is inserted, so that errors in transmission can be reliably detected. In synchronous operation, characters must be provided on time until a frame is complete; if the controlling processor does not do so, this is an ''"underrun error''," and transmission of the frame is aborted.

* USARTs operating as synchronous devices used either character-oriented or bit-oriented mode. In character (STR and BSC) modes, the device relied on particular characters to define frame boundaries; in bit (HDLC and SDLC) modes earlier devices relied on physical-layer signals, while later devices took over the physical-layer recognition of bit patterns.

* A synchronous line is never silent; when the modem is transmitting, data is flowing. When the physical layer indicates that the modem is active, a USART will send a steady stream of padding, either characters or bits as appropriate to the device and protocol.

== Devices ==

{| class="wikitable"

!Manufacturer

!Device

!Description

!Device data

|-

|Intel

|[[Intel 8251|8251]]A<ref>{{Cite book |last1=Khalid |first1=Saifullah |url=https://books.google.com/books?id=DVHPhOTrAWcC |title=Microprocessor System |last2=Agrawal |first2=Neetu |publisher=Laxmi Publications Pvt Limited |year=2009 |isbn=9788131807521}}</ref>{{Rp|page=396}}

|Programmable communications interface

|Intel 8251A data sheet<ref>{{Cite web |title = Intel 8251A Programmable Communication Interface |url = http://www.datasheetarchive.com/dlmain/Datasheets-14/DSA-278171.pdf |website = www.datasheetarchive.com |access-date = 2015-12-16 |archive-url=https://web.archive.org/web/20151222120842/http://www.datasheetarchive.com/dlmain/Datasheets-14/DSA-278171.pdf |archive-date=22 December 2015 |url-status=dead}}</ref>

|-

|Signetics / Philips

|2651

|Programmable communications interface

|Philips Semiconductors SCN2651 data sheet<ref>{{Cite web | title = Philips Semiconductors SCN2651 Programmable Communications Interface | url = https://datasheet.datasheetarchive.com/originals/distributors/Datasheets-25/DSA-495164.pdf | website = www.datasheetarchive.com | access-date = 2020-04-05}}</ref>

|-

|Zilog

|"SIO" Z8440&ndash;4/Z84C40&ndash;4

|Serial input/output controller

|Zilog #ps0183, Z8440/1/2/3/4 and Z84C40/1/2/3/4 data sheet<ref name="zilog_com-ps0183">{{cite web|title=Zilog Product specification Z8440/1/2/4, Z84C40/1/2/3/4. Serial input/output controller|url=http://www.zilog.com/docs/z80/ps0183.pdf}} 090529 zilog.com</ref>

|-

|Zilog

|[[Zilog SCC|"SCC"]] Z8530/Z85C30; Z85230/Z80230/Z8523L/Z85233

|Enhanced serial communications controller

|IXYS web page<ref>{{Cite web | title = Enhanced Serial Communications Controllers | url = http://www.zilog.com/index.php?option=com_cutsheet&task=view&cid=8&id=8|website = www.zilog.com | access-date = 2015-12-16}}</ref>

|}

== References ==

<references />

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{{DEFAULTSORT:Universal Synchronous Asynchronous Receiver Transmitter}}

[[Category:Data transmission]]