Universal synchronous and asynchronous receiver-transmitter: Difference between revisions

Content deleted Content added
Mention modem modulation techniques.
BajaChikn (talk | contribs)
Added image and caption #app-image-add-top
Tags: Mobile edit Mobile app edit iOS app edit
 
(27 intermediate revisions by 17 users not shown)
Line 1:
[[File:USART.png | thumb | right | alt=An example of a USART | An example of a USART]]A '''Universaluniversal Synchronous/Asynchronoussynchronous Receiver/Transmitterand asynchronous receiver-transmitter''' ('''USART''', '''programmable communications interface''' or '''PCI''')<ref>{{Cite web |date=2017-12-04 |title=8251A-Programmable Communication Interface Notes - Computer Science Engineering (CSE) |url=https://edurev.in/studytube/8251A-Programmable-Communication-Interface-Micropr/75b44fe5-ea73-4bc7-88e4-4a74b1f65084_t |access-date=2022-07-02 |website=EDUREV.IN |language=en}}</ref> is a type of a serial interface device that can be programmed to communicate asynchronously or synchronously. See [[Universaluniversal asynchronous receiver/-transmitter]] (UART) for a discussion of the asynchronous capabilities of these devices.
 
== Purpose and Historyhistory ==
The USART's synchronous capabilities were primarily intended to support synchronous protocols like IBM's [[Synchronoussynchronous transmit-receive]] (STR), [[Binary Synchronous Communications|binary synchronous communications]] (BSC), [[Synchronoussynchronous Datadata Linklink Controlcontrol]] (SDLC), and the ISO-standard [[High-Level Data Link Control|high-level data link control]] (HDLC) synchronous link-layer protocols, which were used with synchronous voice-frequency [[modem]]s. These protocols were designed to make the best use of bandwidth when modems were analog devices. In those times, the fastest asynchronous voice-band modem could achieve at most speeds of 300 bps{{nbsp}}bit/s using [[frequency-shift keying]] (FSK) modulation, while synchronous modems could run at speeds up to 9600 bps{{nbsp}}bit/s using [[phase-shift keying]]. (PSK). Synchronous transmission used only slightly over 80% of the bandwidth of the now more-familiar asynchronous transmission, since start and stop bits were unnecessary. Those modems are obsolete, having been replaced by modems with which convert asynchronous data to synchronous forms, but similar synchronous telecommunications protocols survive in numerous block-oriented technologies such as the widely- used [[IEEE 802.2]] (Ethernet) link-level protocol. USARTs are still sometimes integrated with MCUs.{{Expand section|currentUSARTs protocolsare usingstill synchronousused framing,in ifrouters anythat existconnect to external CSU/DSU devices, and they often use either Cisco's proprietary HDLC implementation or athe statement[[Internet thatEngineering noneTask do.Force|date=DecemberIETF]] 2015standard [[point-to-point protocol]] (PPP) in HDLC-like framing as defined in RFC{{nbsp}}1662.
 
== Operation ==
The operation of a USART is intimately related to the various protocols; refer to those pages for details. This section only provides a few general notes.
 
* USARTs in synchronous mode transmits data in [[Frame (networking)|frames]]. In synchronous operation, characters must be provided on time until a frame is complete; if the controlling processor does not do so, this is an ''"underrun error''," and transmission of the frame is aborted.
* USARTs operating as synchronous devices used either character-oriented or bit-oriented mode. In character (STR and BSC) modes, the device relied on particular characters to define frame boundaries; in bit (HDLC and SDLC) modes earlier devices relied on physical-layer signals, while later devices took over the physical-layer recognition of bit patterns.
* A synchronous line is never silent; when the modem is transmitting, data is flowing. When the physical layer indicates that the modem is active, a USART will send a steady stream of padding, either characters or bits as appropriate to the device and protocol.
 
== Devices ==
Line 15 ⟶ 16:
!Device
!Description
!Device Datadata
|-
|Intel
|[[Intel 8251|8251]]A<ref>{{Cite book |last1=Khalid |first1=Saifullah |url=https://books.google.com/books?id=DVHPhOTrAWcC |title=Microprocessor System |last2=Agrawal |first2=Neetu |publisher=Laxmi Publications Pvt Limited |year=2009 |isbn=9788131807521}}</ref>{{Rp|page=396}}
|8251A
|Programmable Communicationscommunications Interfaceinterface
|Intel 8251A Datadata Sheet.sheet<ref>{{Cite web | title = Intel 8251A Programmable CommunicationsCommunication Interface, | url = http://www.datasheetarchive.com/dlmain/Datasheets-14/DSA-278171.pdf | website = www.datasheetarchive.com | accessdateaccess-date = 2015-12-16 |archive-url=https://web.archive.org/web/20151222120842/http://www.datasheetarchive.com/dlmain/Datasheets-14/DSA-278171.pdf |archive-date=22 December 2015 |url-status=dead}}</ref>
|-
|Signetics / Philips
|2651
|Programmable communications interface
|Philips Semiconductors SCN2651 data sheet<ref>{{Cite web | title = Philips Semiconductors SCN2651 Programmable Communications Interface | url = https://datasheet.datasheetarchive.com/originals/distributors/Datasheets-25/DSA-495164.pdf | website = www.datasheetarchive.com | access-date = 2020-04-05}}</ref>
|-
|Zilog
|"SIO" Z8440&ndash;4/Z84C40&ndash;4
|Serial input/output controller
|Zilog #ps0183, Z8440/1/2/3/4 and Z84C40/1/2/3/4 data sheet<ref name="zilog_com-ps0183">{{cite web|title=Zilog Product specification Z8440/1/2/4, Z84C40/1/2/3/4. Serial input/output controller|url=http://www.zilog.com/docs/z80/ps0183.pdf}} 090529 zilog.com</ref>
|-
|Zilog
|[[Zilog SCC|"SCC"]] Z8530/Z85C30; Z85230/Z80230/Z8523L/Z85233
|Enhanced Serialserial Communicationscommunications Controllercontroller
|IXYS web page<ref>{{Cite web | title = Enhanced Serial Communications Controllers, | url = http://www.zilog.com/index.php?option=com_cutsheet&task=view&cid=8&id=8|website = www.zilog.com | accessdateaccess-date = 2015-12-16}}</ref>
|}
 
== References ==
<references />
__NOTOC__
 
{{DEFAULTSORT:Universal Synchronous Asynchronous Receiver Transmitter}}