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== Rewrite ==
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[[User:Ipsign|Ipsign]] ([[User talk:Ipsign|talk]]) 05:15, 1 November 2010 (UTC)
:::::::: Yes, we have an agreement on the naming of the articles. You can rename them and create the disambiguation page whenever you please. [[User:Rilak|Rilak]] ([[User talk:Rilak|talk]]) 07:39, 1 November 2010 (UTC)
:::::::::Renamed per proposal, please take a look and comment if necessary. [[User:Ipsign|Ipsign]] ([[User talk:Ipsign|talk]]) 14:24, 1 November 2010 (UTC)
== On article title ==
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::::::::However, I would like to use this oppurtunity to comment on your position that "Multithreading (computer architecture)" is overbroad. In a paper by Sohi et al. called "Multiscalar Processors" that was presented at ISCA '95, on page nine they state that multiscalar processors are not multithreaded and should not be confused as such. They elaborate as to why and they cite several differences. This paper, IIRC, is the seminal paper on multiscalar processors and is cited over 800 times, according to Google Scholar. So, my question is, have the definitions of multiscalar and multhreading changed dramatically between 1995 to 2003, when the ACM survey was published, and the present? If not, I don't think that multiscalar and mulithreading is going to be often confused with each other, and even if they were confused, I don't think that it's that big a problem to require better a title. [[User:Rilak|Rilak]] ([[User talk:Rilak|talk]]) 07:39, 1 November 2010 (UTC)
:::::::::If multi-scalar processors are ''not'' multi-threading, then what ''is'' multi-threading which is ''not'' covered by ''Explicit multithreading in processors'' (as described in previously quoted ''Survey'' article http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.96.9105&rep=rep1&type=pdf)? I'm not an expert on hardware multithreading (besides certain aspects of SMT), so I can only try to reason based on material we can find. [[User:Ipsign|Ipsign]] ([[User talk:Ipsign|talk]]) 14:02, 1 November 2010 (UTC)
'''Outdent'''
I'm not sure what you mean. Are you asking what implicit multithreading is? If this is what you're asking, then I'm going to say that implicit multithreading is one way to categorize parallel execution paradigms. Regarding your emphasis when you mentioned the ACM survey, is it meant to say you are convinced that it's more authorative?
Finally, I am certainly not an authority on computer architecture. I hope that I am not giving the impression that I am. Like you, I am relying on published material to form a position regarding whether multiscalar is or is not multithreading. The paper that I mentioned previously is not the seminal work on multiscalar processors. Manoj Franklin's ''The Multiscalar Architecture'', a thesis, appears to be the one. You can find it at Citeeseer like the Sohi paper. [[User:Rilak|Rilak]] ([[User talk:Rilak|talk]]) 05:31, 2 November 2010 (UTC)
:: "Are you asking what implicit multithreading is?" - no, I'm trying to figure out ''where in the current [[Multithreading (computer architecture)]] article it is mentioned?'' And if it is not in the article, do you think it belongs there? [[User:Ipsign|Ipsign]] ([[User talk:Ipsign|talk]]) 08:44, 2 November 2010 (UTC)
:: Actually, now (after going through several dozens of DAB links) I tend to withdraw my objection to the article name, though it seems that it will need to be heavily expanded to cover this whole topic. [[User:Ipsign|Ipsign]] ([[User talk:Ipsign|talk]]) 12:38, 3 November 2010 (UTC)
::: I scrolled through the article and I think that it only covers what the ACM paper calls explicit multithreading. I don't think that we need to cover implicit multithreading here as those architectures are not generally categorized as multithreading. [[User:Rilak|Rilak]] ([[User talk:Rilak|talk]]) 03:13, 8 November 2010 (UTC)
== System thread ==
I worked with some mainframes a long time ago which implemented hardware multithreading with two streams, but reserved one stream for the system. The instructions were split into one or more packets which travelled down the pipeline in two streams and the stages of the pipeline just took the next packet from either stream according to priority and if the resources were available, there was no switching overhead. There were two sets of registers and the caches had an identifier per line saying which process they were associated with or whether they were shared. Interrupts were normally vectored to the system reserved stream and it got higher priority as soon as it received an interrupt, it also dealt with things like scheduling the processor and decoding virtual addresses for the input output.
Is there a name for this type of multithreading which was invisible to most users? The arrangement meant single threaded processes ran better than they might otherwise because many overheads were dealt with in parallel in the background. Do any processors nowadays do this business of having a second stream deal with such overheads, or does it happen in practice anyway when not all available hardware threads are being used by programs? [[User:Dmcq|Dmcq]] ([[User talk:Dmcq|talk]]) 12:21, 3 November 2010 (UTC)
== External links modified (February 2018) ==
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*Added archive https://web.archive.org/web/20100821074918/http://cache-www.intel.com/cd/00/00/01/77/17705_htt_user_guide.pdf to http://cache-www.intel.com/cd/00/00/01/77/17705_htt_user_guide.pdf
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