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{{about|the general concept|its implementation found in x86 processors|Interrupt descriptor table}}
[[File:X86 Interrupt Vector Table.svg|thumb]]
An '''interrupt vector table''' ('''IVT''') is a [[data structure]] that associates a list of [[interrupt handler]]s with a list of [[interrupt request]]s in a table of interrupt vectors. Each entry of the interrupt vector table, called an interrupt vector, is the address of an interrupt handler (also known as [[Interrupt_handler|ISR]]). While the concept is common across processor architectures, IVTs may be implemented in architecture-specific fashions. For example, a [[dispatch table]] is one method of implementing an interrupt vector table.
==Background==
Most processors have an interrupt vector table, including chips from [[Intel]], [[AMD]], [[Infineon Technologies|Infineon]], Microchip<ref>[http://ww1.microchip.com/downloads/en/DeviceDoc/70189c.pdf "dsPIC33F Family Reference Manual"] section 29.1.1 Interrupt Vector Table
</ref> [[AVR microcontrollers|Atmel]],<ref>[http://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html "AVR Libc User Manual"] section: Introduction to avr-libc's interrupt handling</ref> NXP, [[ARM architecture|ARM]],<ref>{{Cite web|title=Documentation – Arm Developer|url=https://developer.arm.com/documentation/dui0552/a/the-cortex-m3-processor/exception-model/vector-table|access-date=2020-07-26|website=developer.arm.com}}</ref><ref>{{Cite web
==Interrupt handlers==
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===="Predefined"====
The "predefined" method loads the [[program counter]] (PC) directly with the address of some entry inside the interrupt vector table. The [[jump table]] itself contains executable code. While in principle an extremely short interrupt handler could be stored entirely inside the interrupt vector table, in practice the code at each entry is a single jump instruction that jumps to the full interrupt service routine (ISR) for that interrupt. The Intel [[Intel 8080|8080]],<ref>{{Cite book|title=Intel 8080 Microcomputer Systems User's Manual
===="Fetch"====
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== See also ==
* [[Interrupt
== References ==
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== External links ==
*[http://developer.intel.com/design/pentium/manuals/ Intel® Architecture Software Developer's Manual, Volume 3: System Programming Guide] {{Webarchive|url=https://web.archive.org/web/20090216132436/http://developer.intel.com/design/pentium/manuals/ |date=2009-02-16 }}
** [https://web.archive.org/web/20081221050950/http://download.intel.com/design/processor/manuals/253668.pdf Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A:System Programming Guide, Part 1] (see CHAPTER 6, INTERRUPT AND EXCEPTION HANDLING and CHAPTER 10, ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER)]
*
[[Category:Interrupts]]
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