Background debug mode interface: Difference between revisions

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{{CleanupUse American English|date =October 2009March 2019}}

{{Short description|Debugging interface for embedded systems}}

'''Background Debug Mode''' (BDM) interface is an electronic interface that allows [[debugging]] of [[embedded system]]s. Specifically, it provides [[in-circuit emulator|in-circuit debugging]] functionality in microcontrollers. It requires a single wire and specialized electronics in the system being debugged.

{{Use mdy dates|date = March 2019}}

It appears in many [[Freescale Semiconductor]] products.

'''Background debug mode''' ('''BDM''') interface is an electronic interface that allows [[debugging]] of [[embedded system]]s. Specifically, it provides [[in-circuit emulator|in-circuit debugging]] functionality in microcontrollers. It requires a single wire and specialized electronics in the system being debugged. It appears in many [[Freescale Semiconductor]] products. Background commands are categorized into two types: Non-intrusive commands and Active background commands. Non-intrusive commands can be issued while the user program is running, which include memory access commands.<ref>{{Cite web |url=https://www.datasheetarchive.com/datasheet?id=a84bd5f4cb577c604e833c56c460f32672f7e4&type=M&term=hcs08rmv1 |title=HCS08 Family Reference Manual |pages=34-35 |accessdate=2024-02-06}}</ref>

The interface allows a ''Host'' to manage and query a ''Target''. Specialized hardware is required in the target device. No special hardware is required in the host; a simple [[bi-directional]] [[I/O port|I/O pin]] is sufficient.

The interface allows a ''Host'' to manage and query a ''Targettarget''. Specialized hardware is required in the target device. No special hardware is required in the host; a simple [[bi-directional]]bidirectional [[I/O port|I/O pin]] is sufficient.

== I/O signals ==

The signals used by BDM to communicate data to and from the target are initiated by the host processor. The host [[wiktionary:negates|negates]] the transmission line, and then either

* [[wiktionary:asserts|Asserts]] the line sooner, to output a 1,

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At the start of the next bit time, the host negates the transmission line, and the process repeats. Each bit is communicated in this manner.

In other words, the increasing complexity of today’stoday's software and hardware designs is leading to some fresh approaches to debugging. ''Silicon manufacturers offer more and more on-chip debugging features for emulation of new processors''.

This capability, implemented in various processors under such names as Backgroundbackground Debugdebug Modemode (BDM), [[Joint Test Action Group|JTAG]] and on-chip emulation{{Dubious[[In-circuit emulator|date=Marchin-circuit 2010}}emulation]], puts basic debugging functions on the chip itself. With a BDM (1 wire interface) or JTAG (standard JTAG) [[debug port]], you control and monitor the microcontroller solely through the stable on-chip debugging services.

This debugging mode runs even when the target system crashes and enables developers to continue investigating the cause of the crash.

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==Microcontroller application development==

A good development tool environment is important to reduce total development time and cost. Users want to debug their application program under conditions that imitate the actual setup of their system. Because of that, the capability to debug a user program in an actual target system is required. This is known as [[in-circuit emulator|in-circuit debugging]]. Furthermore, most new MCUs have nonvolatile memory such as [[flash memory]] so that programming code on the target system is also required.{{Dubious|date=March 2010}} This is known as [[In-system programming|in-circuit programming]].

To support in-circuit debugging and programming requirements, the [[HC08]] Family has the monitor mode and the HCS08 and RS08 utilize a background debug mode (BDM). The background debug hardware on the HCS08 consists of a background debug controller (BDC) and debug module (DBG). The background debug hardware on the RS08 consists of the background debug controller (BDC) only.

== BDM commands ==

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== BDM functions ==

Depending on the target part, the BDM controller may feature a hardware [[breakpoint]] register. The register holds a value indicating an [[memory address|address]] in memory. When the target part's CPU accesses that ___location in memory, the BDM hardware can take control of the target part, stop program execution, and begin operating in Backgroundbackground Modemode.

== References ==

{{reflist}}

* Motorola (Freescale Semiconductor Inc.). CPU12 Reference Manual (CPU12RM/AD).

* Freescale Semiconductor Inc. MC9RS08KA2 Data Sheet (MC9RS08KA2, Rev. 1.0).

== External links ==

* Freescale Semiconductor Inc. RS08 Core Reference Manual (RS08RM, Rev. 1.0).

* Freescale Semiconductor Inc. [https://www.nxp.com/docs/en/data-sheet/MC9RS08KA2.pdf MC9RS08KA2 Data Sheet (MC9RS08KA2, Rev. 14.0).]

* Freescale Semiconductor Inc. [https://web.archive.org/web/20051022211235/http://www.freescale.com/files/microcontrollers/doc/ref_manual/CPU12RM.pdf CPU12 Reference Manual]

* Freescale Semiconductor Inc. [https://hibp.ecse.rpi.edu/courses/CStudio/hc12/CPU12RM.pdf CPU12 Reference Manual]

* Freescale Semiconductor Inc. [https://web.archive.org/web/20140309095025/http://cache.freescale.com/files/microcontrollers/doc/ref_manual/RS08RM.pdf RS08 Core Reference Manual]

* Freescale Semiconductor Inc. [https://www.nxp.com/docs/en/reference-manual/RS08RM.pdf RS08 Core Reference Manual (RS08RM, Rev. 1.0).]

* Freescale Semiconductor Inc. [https://web.archive.org/web/20120312074607/http://cache.freescale.com/files/microcontrollers/doc/ref_manual/HCS08RMV1.pdf HCS08 Family Reference Manual]

* Freescale Semiconductor Inc. [https://www.datasheetarchive.com/datasheet?id=a84bd5f4cb577c604e833c56c460f32672f7e4&type=M&term=hcs08rmv1 HCS08 Family Reference Manual]

[[Category:Embedded systems]]