Flash memory controller: Difference between revisions

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{{Short description|Integrated circuit that interfaces flash memory to a host like a PC}}

[[File:Lexar USB stick 8 GB - Silicon Motion SM3253L-0309.jpg|thumb|Lexar USB stick 8 GB - Silicon Motion SM3253L - USB 2.0 single-channel flash controller.]]

A '''flash memory controller''' (or '''flash controller''') manages data stored on [[flash memory]] (usually [[NAND flash]]) and communicates with a [[computer]] or [[electronic device]]. Flash memory controllers can be designed for operating in low [[duty-cycle]] environments like [[memory card]]s, or other similar [[Data storage device|media]] for use in [[Personal digital assistant|PDA]]s, [[mobile phone]]s, etc. [[USB flash drive]]s use flash memory controllers designed to communicate with [[personal computer]]s through the [[USB port]] at a low duty-cycle. Flash controllers can also be designed for higher duty-cycle environments like [[solid-state drive]]s (SSDSSDs) used as data storage for [[laptop]] computer systems up to [[mission-critical]] enterprise [[storage array]]s.<ref name="kingston">{{cite web|title=Flash Memory Guide|url=http://media.kingston.com/pdfs/FlashMemGuide.pdf|publisher=kingston.com|access-date=7 March 2013}}</ref>

==Initial setup==

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{{Main|Wear leveling}}

Flash memory can withstand a limited number of program-erase cycles. If a particular flash memory block were programmed and erased repeatedly without writing to any other blocks, the one block would wear out before all the other blocks thereby prematurely ending the life of the storage device. For this reason flash controllers use a technique called [[wear leveling]] to distribute writes as evenly as possible across all the flash blocks in the SSD. In a perfect scenario this would enable every block to be written to its maximum life so they all fail at the same time.<ref name="Li-Pin Chang">{{cite citeseerxCiteSeerX |citeseerx = 10.1.1.103.4903 |title=On Efficient Wear Leveling for Large Scale Flash Memory Storage Systems |author=Chang, Li-Pin |date=2007-03-11}}</ref>

==Flash translation layer (FTL) and mapping==

{{main|Flash file system}}

Usually, flash memory controllers also include the "flash translation layer" (FTL), a layer below the file system that maps host side or file system logical block addresses (LBAs) to the physical address of the flash memory (logical-to-physical mapping). The LBAs refer to sector numbers and to a mapping unit of 512 bytes. All LBAs that represent the logical size visible to and managed by the file system are mapped to a physical ___location (block ID, page ID and sector ID) of the Flash. As part of the [[wear leveling]] and other flash management algorithms (bad block management, read disturb management, safe flash handling etc.), the physical ___location of an LBA might dynamically change frequently. The mapping units of an FTL can differ so that LBAs are mapped block-, page- or even sub-page-based. Depending on the usage pattern, a finer mapping granularity can significantly reduce the flash wear out and maximize the endurance of a flash based storage media.<ref>{{cite web|url=http://drona.csa.iisc.ernet.in/~gopi/west10/goodson.pdf|title=Design Tradeoffs in a Flash Translation Layer|first1=Garth|last1=Goodson|first2=Rahul|last2=Iyer|archive-url=https://web.archive.org/web/20150623162937/http://drona.csa.iisc.ernet.in/~gopi/west10/goodson.pdf|archive-date=June 23, 2015}}</ref><ref>{{cite web|url=http://flashdba.com/2014/09/17/understanding-flash-the-flash-translation-layer/|title=Understanding Flash: The Flash Translation Layer|date=September 17, 2014}}</ref><ref>{{cite web|url=http://files.iccmedia.com/magazines/basfeb15/basfeb15-p25.pdf|title=New flash management architecture enables MLC for industrial storage|first=Susan|last=Heidrich|date=February 2015|access-date=2015-06-23|archive-date=2015-06-23|archive-url=https://web.archive.org/web/20150623164236/http://files.iccmedia.com/magazines/basfeb15/basfeb15-p25.pdf|url-status=dead}}</ref> The deduplication function to eliminate redundant data and duplicate writes is also added in FTL.<ref>{{Cite conference |first1=Feng|last1=Chen|first2=Tian|last2=Luo|first3=Xiaodong|last3=Zhang | title=CAFTL: a content-aware flash translation layer enhancing the lifespan of flash memory based solid state drives |conference= FAST' 11 | page=6|year=2011|url=https://dl.acm.org/doi/10.5555/1960475.1960481}}</ref>

As the FTL metadata takes up its own flash space, it too needs protection in case of power loss. In addition, it is possible for the mapping table to wear out before other parts of the flash memory has, prematurely ending the life of a storage device. This is usually avoided in enterprise devices by allocating an oversized space for spares, although more durable forms of storage like [[Magnetoresistive RAM|MRAM]] has been proposed for FTL too.{{Citation needed|date=May 2023}}

The FTL may have three types: page mapping, block mapping, and hybrid mapping. Page mapping can have higher performance, but it has bigger FTL metadata size and higher cost, and is usually used on [[solid state drive]]s. Block mapping can have smaller metadata size and lower cost, but it has lower performance, and is usually used on [[USB flash drive]]s. On page mapping FTL implementations, the ratio of FTL metadata size and storage capacity is usually 1:1000, for example, a 1TB flash storage device may have 1GB of FTL metadata.

==Garbage collection==

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[[Category:Computer memory]]

[[Category:Solid-state computer storage]]

[[Category:Application-specific integrated circuits]]