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{{short description|Part of a computer system}}
[[File:X87 FPUs.jpg|Collection of the [[x87]] family of math coprocessors by [[Intel]]|thumb|upright=1]]
A '''floating-point unit''' ('''FPU'''), '''numeric processing unit''' ('''NPU'''),<ref>{{cite web |url=https://www.computinghistory.org.uk/det/35216/Intel-80287XL-Numeric-Processing-Unit/ |title=Intel 80287XL Numeric Processing Unit |website=computinghistory.org.uk |access-date=2024-11-02}}</ref> colloquially
Floating-point operations were originally handled in [[software]] in early computers. Over time, manufacturers began to provide standardized floating-point libraries as part of their software collections. Some machines, those dedicated to scientific processing, would include specialized hardware to perform some of these tasks with much greater speed. The introduction of [[microcode]] in the 1960s allowed these instructions to be included in the system's [[instruction set architecture]] (ISA). Normally these would be decoded by the microcode into a series of instructions that were similar to the libraries, but on those machines with an FPU, they would instead be routed to that unit, which would perform them much faster. This allowed floating-point instructions to become universal while the floating-point hardware remained optional; for instance, on the [[PDP-11]] one could add the floating-point processor unit at any time using plug-in [[expansion card]]s.
▲A '''floating-point unit''' ('''FPU''', colloquially a '''math coprocessor''') is a part of a [[computer]] system specially designed to carry out operations on [[Floating-point arithmetic|floating-point]] numbers.<ref>{{Cite journal |author-last1=Anderson |author-first1=Stanley F. |authors=< |author-first2=John G. |author-last3=Goldschmidt |author-first3=Robert Elliott |author-last4=Powers |author-first4=Don M. |date=January 1967 |title=The IBM System/360 Model 91: Floating-Point Execution Unit |journal=[[IBM Journal of Research and Development]] |volume=11 |issue=1 |pages=34–53 |doi=10.1147/rd.111.0034 |issn=0018-8646}}</ref> Typical operations are [[addition]], [[subtraction]], [[multiplication]], [[division (mathematics)|division]], and [[square root]]. Some FPUs can also perform various [[transcendental function]]s such as [[Exponential function|exponential]] or [[trigonometric]] calculations, but the accuracy can be low,<ref>{{cite web |author=Dawson |first=Bruce |date=2014-10-8282=><|title=Intel Underestimates Error Bounds by 1.3 quintillion |url=https://randomascii.wordpress.com/2014/10/09/intel-underestimates-error-bounds-by-1-3-quintillion/ |access-date=2020-01-16 |website=randomascii.wordpress.com}}</ref><ref>{{cite web |url=https://software.intel.com/en-us/blogs/2014/10/09/fsin-documentation-improvements-in-the-intel-64-and-ia-32-architectures-software |title=FSIN Documentation Improvements in the "Intel® 64 and IA-32 Architectures Software Developer's Manual" |website=intel.com | date=2014-10-09 |access-date=2020-01-16 |archive-url=https://web.archive.org/web/20200116083121/https://software.intel.com/en-us/blogs/2014/10/09/fsin-documentation-improvements-in-the-intel-64-and-ia-32-architectures-software |archive-date=2020-01-16 |url-status=dead}}</ref> so some systems prefer to compute these functions in software.
The introduction of the [[microprocessor]] in the 1970s led to a similar evolution as the earlier [[mainframe]]s and [[minicomputer]]s. Early [[microcomputer]] systems performed floating point in software, typically in a vendor-specific library included in [[ROM]]. Dedicated single-chip FPUs began to appear late in the decade, but they remained rare in real-world systems until the mid-1980s, and using them required software to be re-written to call them. As they became more common, the software libraries were modified to work like the microcode of earlier machines, performing the instructions on the main CPU if needed, but offloading them to the FPU if one was present. By the late 1980s, [[semiconductor manufacturing]] had improved to the point where it became possible to include an FPU with the main CPU, resulting in designs like the [[i486]] and [[68040]]. These designs were known as an "integrated FPU"s, and from the mid-1990s, FPUs were a standard feature of most CPU designs except those designed as low-cost as [[embedded processor]]s.
In modern designs, a single CPU will typically include several [[arithmetic logic unit]]s (ALUs) and several FPUs, reading many instructions at the same time and routing them to the various units for parallel execution. By the 2000s, even embedded processors generally included an FPU as well.
== History ==
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Floating-point operations are often [[instruction pipelining|pipelined]]. In earlier [[superscalar]] architectures without general [[out-of-order execution]], floating-point operations were sometimes pipelined separately from integer operations.
The modular architecture of [[Bulldozer (microarchitecture)|Bulldozer microarchitecture]] uses a special FPU named FlexFPU, which uses [[simultaneous multithreading]]. Each physical integer core, two per module, is single-threaded, in contrast with Intel's [[Hyperthreading]], where two virtual simultaneous threads share the resources of a single physical core.<ref>{{cite web |url=http://cdn3.wccftech.com/wp-content/uploads/2013/07/AMD-Steamroller-vs-Bulldozer.jpg |title=
== {{anchor|Floating-point emulation}}Floating-point library ==
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In the 1980s, it was common in [[IBM PC]]/compatible [[microcomputers]] for the FPU to be entirely separate from the [[Central processing unit|CPU]], and typically sold as an optional add-on. It would only be purchased if needed to speed up or enable math-intensive programs.
The IBM PC, [[IBM Personal Computer XT|XT]], and most compatibles based on the 8088 or 8086 had a socket for the optional 8087 coprocessor. The [[IBM Personal Computer/AT|AT]] and [[Intel 80286|80286]]-based systems were generally socketed for the [[x87#80287|80287]], and [[Intel 80386|80386/80386SX]]-based machines{{snd}}for the [[x87#80387|80387]] and [[Intel 80387SX|80387SX]] respectively, although early ones were socketed for the 80287, since the 80387 did not exist yet. Other companies manufactured co-processors for the Intel x86 series. These included [[Cyrix]] and [[Weitek]]. [[Acorn Computers]] opted for the WE32206 to offer [[Single-precision floating-point format|single]], [[Double-precision floating-point format|double]] and [[extended precision]]<ref>{{cite web |title=Western Electric 32206 co-processor |url=https://www.cpu-world.com/CPUs/32206/index.html |website=www.cpu-world.com | access-date=2021-11-06}}</ref> to its [[ARM architecture|ARM]] powered [[Acorn Archimedes|Archimedes]] range, introducing a gate array to interface the ARM2 processor with the WE32206 to support the additional ARM floating-point instructions.<ref name="abcomputing199003_arm">{{ cite magazine | title=Programming The ARM: The Floating Point Co-processor | magazine=A&B Computing | last1=Fellows | first1=Paul | date=March 1990 | pages=43–44 }}</ref> Acorn later offered the FPA10 coprocessor, developed by ARM, for various machines fitted with the ARM3 processor.<ref name="acorn_fpa10">{{ cite press release | url=http://chrisacorns.computinghistory.org.uk/docs/Acorn/PR/FPA_release.txt | title=Acorn Releases Floating Point Accelerator | publisher=Acorn Computers Limited | date=5 July 1993 | access-date=7 April 2021 }}</ref>
Coprocessors were available for the [[Motorola 68000 series|Motorola 68000 family]], the [[Motorola 68881|68881 and 68882]]. These were common in [[Motorola 68020]]/[[Motorola 68030|68030]]-based [[workstation]]s, like the [[Sun-3]] series. They were also commonly added to higher-end models of Apple [[Macintosh]] and Commodore [[Amiga]] series, but unlike IBM PC-compatible systems, sockets for adding the coprocessor were not as common in lower-end systems.
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[[Category:Computer arithmetic]]
[[Category:Coprocessors]]
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