Programmable interrupt controller: Difference between revisions

Revision as of 00:32, 11 November 2023

Latest revision as of 17:15, 6 April 2025

(3 intermediate revisions by 3 users not shown)

Line 20:

==Well-known types==

One of the best known PICs, the [[Intel 8259|8259A]], was included in the [[x86 architecture|x86]] PC. In modern times, this is not included as a separate chip in an x86 PC, but rather as part of the motherboard's [[Southbridge (computing)|southbridge]] chipset.<ref>{{Cite web| title=82371AB PCI-TO-ISA / IDE Xcelerator (PIIX4) | url=https://www.intel.com/Assets/PDF/datasheet/290562.pdf {{Bare URL| archive-url=https://web.archive.org/web/20090203012354/http://www.intel.com:80/Assets/PDF/datasheet/290562.pdf | archive-date=March 20222009-02-03}}</ref> In other cases, it has been replaced by the newer [[Advanced Programmable Interrupt Controller]]s which support more interrupt outputs and more flexible priority schemas.

==See also==

Line 31:

==Further reading==

More information on the Intel APIC can be found in the ''IA-32 Intel Architecture Software Developer's Manual, Volume 3A: System Programming Guide, Part 1, Chapter 10'', freely available on the [[Intel]] website.

* {{Cite web |date=2023-06-22 |title=Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A |url=https://www.intel.com/content/www/us/en/content-details/782158/intel-64-and-ia-32-architectures-software-developer-s-manual-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4.html?wapkw=intel%2064%20and%20ia-32%20architectures%20software%20developer%27s%20manual&docid=782161 |access-date=2025-03-28 |website=[[Intel]]}}

==References==

Line 37 ⟶ 38:

==External links==

* [http://www.intel.com/Assets/PDF/manual/253668.pdf IA-32 Intel Architecture Software Developer's Manual, Volume 3A]

* [https://web.archive.org/web/20180408090800/http://www.fullchipdesign.com/tyh/interrupt_controller_vic.htm Interrupt controller and associated registers.]