Multithreading (computer architecture): Difference between revisions

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{{DablinkFor|This article describes hardware supports for multithreads. For threadthreads in software, see [[|Thread (computer sciencecomputing)]].}}

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{{Refimprove|date=October 2009}}

{{Original research|date=October 2010}}

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{{short description|Ability of a CPU to provide multiple threads of execution concurrently}}

[[File:Multithreaded process.svg|thumb|A process with two threads of execution, running on a single processor |alt=A process with two threads of execution, running on a single processor. Thread #1 is executed first, eventually starts Thread #2, and waits for a response. When Thread #2 finishes, it signals Thread #1 to resume execution to completion and then finishes.]]

In [[computer architecture]], '''multithreading''' is the ability of a [[central processing unit]] (CPU) (or a single core in a [[multi-core processor]] processor) to executeprovide multiple [[process (computing)|process]]es or [[thread (computer science)|thread]]s concurrently, appropriately supported by the [[operating system]]. This approach differs from [[multiprocessing]], as with multithreading the processes and threads have to share the resources of a single or multiple cores: the computing units, the [[CPU cacheexecution]]s, and the [[translation lookaside buffer]] (TLB).

Where multiprocessing systems include multiple complete processing units, multithreading aims to increase utilization of a single core by using thread-level as well as instruction-level parallelism. As the two techniques are complementary, they are sometimes combined in systems with multiple multithreading CPUs and in CPUs with multiple multithreading cores.

==Overview==

The multithreading [[paradigm]] has become more popular as efforts to further exploit [[instruction-level parallelism]] have stalled since the late 1990s. This allowed the concept of [[throughput computing]] to re-emerge from the more specialized field of [[transaction processing]];. evenEven though it is very difficult to further speed up a single thread or single program, most computer systems are actually multitasking among multiple threads or programs. Thus, techniques that improve the throughput of all tasks result in overall performance gains.

Two major techniques for throughput computing are ''multithreading'' and ''[[multiprocessing]]''.

===Advantages===

If a thread gets a lot of [[CPU cache#Cache miss|cache misses]], the other threads can continue taking advantage of the unused computing resources, which may lead to faster overall execution, as these resources would have been idle if only a single thread were executed. Also, if a thread cannot use all the computing resources of the CPU (because instructions depend on each other's result), running another thread may prevent those resources from becoming idle.

If several threads work on the same set of data, they can actually share their cache, leading to better cache usage or synchronization on its values.

===Disadvantages===

Multiple threads can interfere with each other when sharing hardware resources such as caches or [[translation lookaside buffer]]s (TLBs). As a result, execution times of a single thread are not improved butand can be degraded, even when only one thread is executing, due to lower frequencies or additional pipeline stages that are necessary to accommodate thread-switching hardware.

Overall efficiency varies; [[Intel]] claims up to 30% improvement with its [[HyperThreadingHyper-Threading Technology]] technology,<ref>[{{cite web|url=http://cache-www.intel.com/cd/00/00/01/77/17705_htt_user_guide.pdf ''|title=Intel Hyper-Threading Technology, Technical User's Guide'']|page=13|archive-url=https://web.archive.org/web/20100821074918/http://cache-www.intel.com/cd/00/00/01/77/17705_htt_user_guide.pdf|archive-date=2010-08-21}}</ref> while a synthetic program just performing a loop of non-optimized dependent floating-point operations actually gains a 100% speed improvement when run in parallel. On the other hand, hand-tuned [[assembly language]] programs using [[MMX (instruction set)|MMX]] or [[AltivecAltiVec]] extensions and performing data pre-fetchesprefetches (as a good video encoder might) do not suffer from cache misses or idle computing resources. Such programs therefore do not benefit from hardware multithreading and can indeed see degraded performance due to contention for shared resources.

From the software standpoint, hardware support for multithreading is more visible to software, requiring more changes to both application programs and operating systems than multiprocessing. Hardware techniques used to support [[thread (computer science)|multithreading]] often parallel the software techniques used for [[computer multitasking]] of computer programs|computer multitasking]]. Thread scheduling is also a major problem in multithreading.

Merging data from two processes can often incur significantly higher costs compared to processing the same data on a single thread, potentially by two or more orders of magnitude due to overheads such as inter-process communication and synchronization. <ref>{{Cite book |title=Operating System Concepts |isbn=978-0470128725 |last1=Silberschatz |first1=Abraham |last2=Galvin |first2=Peter B. |last3=Gagne |first3=Greg |date=29 July 2008 |publisher=Wiley }}</ref><ref>{{Cite book |title=Computer Organization and Design MIPS Edition: The Hardware/Software Interface (The Morgan Kaufmann Series in Computer Architecture and Design) |date=2013 |publisher=Morgan Kaufmann |isbn=978-0124077263}}</ref><ref>{{Cite book |title=Parallel Programming: Techniques and Applications Using Networked Workstations and Parallel Computers |date=2005 |publisher=Pearson |isbn=978-0131405639}}</ref>

==Types of multithreading==

===Block multithreading===

==Types==

The simplest type of multithreading occurs when one thread runs until it is blocked by an event that normally would create a long-latency stall. Such a stall might be a cache miss that has to access off-chip memory, which might take hundreds of CPU cycles for the data to return. Instead of waiting for the stall to resolve, a threaded processor would switch execution to another thread that was ready to run. Only when the data for the previous thread had arrived, would the previous thread be placed back on the list of [[Process states#Ready or waiting|ready-to-run]] threads.

===Block{{main|Temporal multithreading===}}

The simplest type of multithreading occurs when one thread runs until it is blocked by an event that normally would create a long-latency stall. Such a stall might be a cache miss that has to access off-chip memory, which might take hundreds of CPU cycles for the data to return. Instead of waiting for the stall to resolve, a threaded processor would switch execution to another thread that was ready to run. Only when the data for the previous thread had arrived, would the previous thread be placed back on the list of [[Processprocess statesstate#Ready or waiting|ready-to-run]] threads.

For example:

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# Cycle {{math|''i'' + 5}}: instruction {{math|''k'' + 1}} from thread {{mvar|B}} is issued.

Conceptually, it is similar to cooperative multi-tasking used in [[RTOS|real-time operating systemssystem]]s, in which tasks voluntarily give up execution time when they need to wait upon some type of the event. This type of multithreading is known as block, cooperative or coarse-grained multithreading.

The goal of multithreading hardware support is to allow quick switching between a blocked thread and another thread ready to run. Switching from one thread to another means the hardware switches from using one register set to another. To achieve this goal, the hardware cost is to replicatefor the program visible registers, as well as some processor control registers (such as the program counter). Switching from one thread to another thread means the hardware switches from using one register set to another; to switch efficiently between active threads, eachis active thread needs to have its own register setreplicated. For example, to quickly switch between two threads, the registerprocessor hardwareis needsbuilt towith betwo instantiatedsets twiceof registers.

Additional hardware support for multithreading allows thread switching to be done in one CPU cycle, bringing performance improvements. Also, additional hardware allows each thread to behave as if it were executing alone and not sharing any hardware resources with other threads, minimizing the amount of software changes needed within the application and the operating system to support multithreading.

Many families of [[microcontroller]]s and embedded processors have multiple register banks to allow quick [[context switch]]ing for interrupts. Such schemes can be considered a type of block multithreading among the user program thread and the interrupt threads.{{citation needed|date=October 2010}}

===Interleaved Fine-grained multithreading ===

{{main|Barrel processor}}

The purpose of interleavedfine-grained multithreading is to remove all [[data dependency]] stalls from the execution [[Pipelinepipeline (computing)|pipeline]]. Since one thread is relatively independent from other threads, there is less chance of one instruction in one pipelining stage needing an output from an older instruction in the pipeline. Conceptually, it is similar to [[Preemptionpreemption (computing)|preemptive]] multitasking used in operating systems; an analogy would be that the time slice given to each active thread is one CPU cycle.

For example:

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# Cycle {{math|''i'' + 2}}: an instruction from thread {{mvar|C}} is issued.

This type of multithreading was first called barrel processing, in which the [[stave (wood)|staves]] of a barrel represent the pipeline stages and their executing threads. Interleaved, preemptive, fine-grained or time-sliced multithreading are more modern terminology.

In addition to the hardware costs discussed in the block type of multithreading, interleaved multithreading has an additional cost of each pipeline stage tracking the thread ID of the instruction it is processing. Also, since there are more threads being executed concurrently in the pipeline, shared resources such as caches and TLBs need to be larger to avoid thrashing between the different threads.

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{{main|Simultaneous multithreading}}

The most advanced type of multithreading applies to [[superscalar processor]] processorss. Whereas a normal superscalar processor issues multiple instructions from a single thread every CPU cycle, in simultaneous multithreading (SMT) a superscalar processor can issue instructions from multiple threads every CPU cycle. Recognizing that any single thread has a limited amount of [[instruction-level parallelism]], this type of multithreading tries to exploit parallelism available across multiple threads to decrease the waste associated with unused issue slots.

For example:

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In addition to the hardware costs discussed for interleaved multithreading, SMT has the additional cost of each pipeline stage tracking the thread ID of each instruction being processed. Again, shared resources such as caches and TLBs have to be sized for the large number of active threads being processed.

Implementations include [[Digital Equipment Corporation|DEC]] (later [[Compaq]]) [[Alpha 21464|EV8]] (not completed), [[Intel]] [[Hyper-Threading Technology]], [[IBM]] [[POWER5]]/[[POWER6]]/[[POWER7]]/[[POWER8]]/[[POWER9]], IBM [[IBM z13 (microprocessor)|z13]]/[[IBM z14 (microprocessor)|z14]]/[[IBM z15 (microprocessor)|z15]], [[Sun Microsystems]] [[UltraSPARC T2]], [[MIPSCray]] architecture|MIPS[[Cray MTXMT|XMT]], and [[CRAYAMD]] [[CrayBulldozer XMT(microarchitecture)|XMTBulldozer]] and [[Zen (microarchitecture)|Zen]] microarchitectures.

==Implementation specifics==

A major area of research is the thread scheduler that must quickly choose from among the list of ready-to-run threads to execute next, as well as maintain the ready-to-run and stalled thread lists. An important subtopic is the different thread priority schemes that can be used by the scheduler. The thread scheduler might be implemented totally in software, totally in hardware, or as a hardware/software combination.

Another area of research is what type of events should cause a thread switch: cache misses, inter-thread communication, [[Directdirect memory access|DMA]] completion, etc.

If the multithreading scheme replicates all of the software-visible state, including privileged control registers and TLBs, then it enables [[virtual machine]]s to be created for each thread. This allows each thread to run its own operating system on the same processor. On the other hand, if only user-mode state is saved, then less hardware is required, which would allow more threads to be active at one time for the same die area or cost.

==See also==

*[[Async/await]]

{{portal|Computing}}

* [[Super-threading]]

==Types of*[[Speculative multithreading==]]

* [[Super-threading]]

==References==

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==External links==

* [http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.96.9105&rep=rep1&type=pdf A Survey of Processors with Explicit Multithreading], [[Association for Computing Machinery|ACM]], March 2003, by Theo Ungerer, Borut Robi and Jurij Silc

*[https://www.geeksforgeeks.org/operating-system-difference-multitasking-multithreading-multiprocessing/ Operating System | Difference between Multitasking, Multithreading and Multiprocessing] GeeksforGeeks, 6 Sept. 2018.

{{Computer science}}

{{CPU technologies}}

{{Parallel computing}}

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[[Category:Central processing unit]]

[[Category:Instruction processing]]

[[Category:Microprocessors]]

[[Category:Parallel computing]]

[[Category:Threads (computing)]]

* [http://www.technotechmedia.com/2016/08/threading-in-c.html

Multiple Threading in C# by Technotechmedia.com

[[Category:Microprocessors]]

[[Category:Parallel computing]]