Nonvolatile BIOS memory: Difference between revisions

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[[File:Casio fx-8000G - NEC D4364G-1821.jpg|thumb|NEC D4364G 8192 x 8 Bit Static CMOS RAM]]

[[Image:Bottom EPIA PX10000G Motherboard new.jpg|right|thumb|200px|CMOS battery in a [[Pico ITX]] motherboard]]

'''Nonvolatile BIOS memory''' refers to a small [[Memory (computers)|memory]] on [[personal computer|PC]] [[motherboard]]s that is used to store [[BIOS]] settings. It is traditionally called '''CMOS''' RAM because it uses a [[volatile memory|volatile]], low-power [[CMOS|complementary metal–oxide–semiconductor (CMOS)]] [[Static random access memory|SRAM]] (such as the [[Motorola]] MC146818<ref>{{cite book | url=https://books.google.com/books?id=E1p2FDL7P5QC&dq=bios+cmos&pg=PA393 | title=Upgrading and Repairing PCS | isbn=978-0-7897-2974-3 | last1=Mueller | first1=Scott | date=2004 | publisher=Que }}</ref> or similar) powered by a small "CMOS" battery when system and standby power is off.<ref name=whatiscmos>{{cite web |url=http://pcsupport.about.com/od/termsc/g/cmos.htm |title=What is CMOS? (CMOS & CMOS Battery Definition) |publisher=[[About.com]] |first=Tim |last=Fisher |access-date=2 September 2015 |archive-date=9 August 2016 |archive-url=https://web.archive.org/web/20160809082556/http://pcsupport.about.com/od/termsc/g/cmos.htm |url-status=dead }}</ref> It is referred to as non-volatile memory or [[Non-volatile random-access memory|NVRAM]] because, after the system loses power, it does retain state by virtue of the CMOS battery. When the battery fails, BIOS settings are reset to their defaults. The battery can also be used to power a real time clock (RTC) and the RTC, NVRAM and battery may be integrated into a single component. The name CMOS memory comes from the technology used to make the memory, which is easier to say than NVRAM.<ref>{{cite book | url=https://books.google.com/books?id=eV1_LjW3pTkC&dq=cmos+bios+settings+only+one+with+cmos&pg=PA382 | title=Upgrading and Repairing PCS | isbn=978-0-7897-2745-9 | last1=Mueller | first1=Scott | date=2003 | publisher=Que }}</ref>

The CMOS RAM and the real-time clock have been integrated as a part of the [[Southbridge (computing)|southbridge]] chipset and itthey may not be a standalone chipchips on modern motherboards.<ref name="100Series">{{cite web|url=http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html |title=Intel 100 Series Chipset Family PCH Datasheet| publisher=Intel |date=August 2015 |access-date=16 April 2016}}</ref><ref>{{cite web|url=https://www.intel.com/Assets/PDF/datasheet/290562.pdf|title=82430FX PCISET Data Sheet|publisher=Intel|access-date=23 January 2023}}</ref> In turn, the southbridge havehas been integrated into a single [[Platform Controller Hub]]. Alternatively BIOS settings may be stored in the computer's [[Super I/O]] chip.<ref>{{cite book | url=https://books.google.com/books?id=E1p2FDL7P5QC&dq=bios+cmos&pg=PA393 | title=Upgrading and Repairing PCS | isbn=978-0-7897-2974-3 | last1=Mueller | first1=Scott | date=2004 | publisher=Que }}</ref>

The chipset built-in NVRAM capacity is typically 256 [[byte]]s.<ref name="100Series" /> For this reason, later BIOS implementations may use a small portion of BIOS flash ROM as NVRAM, to store BIOS setup and hardware configuration data.<ref>{{Cite web| title=AMIBIOS8 Flash Update & BIOS Recovery Methods | url=http://rom.by/files/AMIBIOS8-Flash-Recovery-Whitepaper.pdf | archive-url=https://web.archive.org/web/20091122214916/http://www.rom.by:80/files/AMIBIOS8-Flash-Recovery-Whitepaper.pdf | archive-date=2009-11-22}}</ref>

Today's [[UEFI]] motherboards use [[NVRAM]] to store configuration data (NVRAM is a portion of the UEFI [[Flash memory|flash]] ROM), but by many [[OEM]]s' design, the UEFI settings are still lost if the CMOS battery fails.<ref>{{Cite web|title=UEFI NVRAM - OSDev Wiki|url=https://wiki.osdev.org/UEFI_NVRAM|access-date=2020-09-11|website=wiki.osdev.org|df=dmy-all}}</ref><ref>{{Cite book|chapter-url=https://media.springernature.com/original/springer-static/image/chp%3A10.1007%2F978-1-4842-6106-4_4/MediaObjects/488723_1_En_4_Fig6_HTML.png|doi = 10.1007/978-1-4842-6106-4_4|chapter = Firmware Resiliency: Detection|title = Building Secure Firmware|year = 2020|last1 = Yao|first1 = Jiewen|last2 = Zimmer|first2 = Vincent|pages = 115–162|isbn = 978-1-4842-6105-7| s2cid=242541772 }}</ref> sex

=={{anchor|Rechargeable CMOS battery}}CMOS battery==