No instruction set computing: Difference between revisions

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{{Short description|Type of computing architecture}}

{{Multiple issues|

{{More citations needed|date=January 2012}}

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* [[Reduced instruction set computer]]

* [[Complex instruction set computer]]

* [[Explicitly parallel instruction computing]]

* [[Minimal instruction set computer]]

* [[Very long instruction word]]

* [[One-instruction set computer]]

* [[TrueNorth]]

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==References==

{{Reflist|refs=

<ref name="BrainChip">{{cite web |title=The Ongoing Quest For The 'Brain' Chip |author-first=Philippe |author-last=Lambinet |date=31 January 2015 |publisher=[[TechCrunch]] |url=https://techcrunch.com/2015/01/31/the-ongoing-quest-for-the-brain-chip/}}</ref>

<ref name="Gigaom">{{cite web |title=Make way for more brain-based chips |author-first=Stacey |author-last=Higginbotham |date=14 November 2011 |publisher=[[Gigaom]] |url=https://gigaom.com/2011/11/14/make-way-for-more-brain-based-chips/|archive-url=https://web.archive.org/web/20111116063042/http://gigaom.com/2011/11/14/make-way-for-more-brain-based-chips/|url-status=dead|archive-date=November 16, 2011}}</ref>

<ref name="NeuroMem">{{cite web |title=NeuroMem IC Matches Patterns, Sees All, Knows All |author-first=Junko |author-last=Yoshida |publisher=[[EE Times]] |url=https://www.eetimes.com/document.asp?doc_id=1325690}}</ref>

}}

== Further reading ==

*Chapter 2. {{Cite book|isbn=978-1402058684 |title=Designing Embedded Processors: A Low Power Perspective: By: Jörg Henkel, Sri Parameswaran |last1=Henkel |first1=Jörg |last2=Parameswaran |first2=Sri |date=11 July 2007 |publisher=Springer }}

==External links==

* [httphttps://wwwpatents.google.com/patentspatent/US5621863 US Patent for ZISC hardware], issued to IBM/G.Paillet on April 15, 1997

* [https://doi.org/10.1023%2FA%3A1021990410058 Image Processing Using RBF like Neural Networks: A ZISC-036 Based Fully Parallel Implementation Solving Real World and Real Complexity Industrial Problems] by K. Madani, G. de Trémiolles, and P. Tannhof

* [http://www.lsmarketing.com/LSMFiles/9809-ai1.htm From CISC to RISC to ZISC] by S. Liebman on lsmarketing.com

* [https://web.archive.org/web/20060527023259/http://www.aboutai.net/DesktopDefault.aspx?article=aa071800a.htm&tabid=2 Neural Networks on Silicon] at aboutAI.net

* {{curlie|Computers/Hardware/Components/Processors/ZISC}}

* [https://patentscope.wipo.int/search/zh/detail.jsf;jsessionid=2EEDB543070890EAD531331F04F3C2DB.wapp2nB?docId=FR290835374&_cid=P21-K8UX94-10474-3 French Patent Request] NISC for purely applicative engine - the sole operation of application (no lambda-calculus that is a particular case of quasi-applicative systems with two operations : application and abstraction - Curry 1958 p.&nbsp;31)