Circuit satisfiability problem: Difference between revisions

Revision as of 22:46, 12 April 2025

Latest revision as of 17:15, 11 June 2025

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Notice that the 3SAT formula is equivalent to the circuit designed above, hence their output is same for same input. Hence, If the 3SAT formula has a satisfying assignment, then the corresponding circuit will output 1, and vice versa. So, this is a valid reduction, and Circuit SAT is NP-hard.

This completes the proof that Circuitcircuit SAT is NP-Complete.

== Restricted variants and related problems ==

=== Planar Circuitcircuit SAT ===

Assume that we are given a planar Boolean circuit (i.e. a Boolean circuit whose underlying graph is [[Planar graph|planar]]) containing only [[NAND gate|NAND]] gates with exactly two inputs. Planar Circuit SAT is the decision problem of determining whether this circuit has an assignment of its inputs that makes the output true. This problem is NP-complete. Moreover, if the restrictions are changed so that any gate in the circuit is a [[NOR gate|NOR]] gate, the resulting problem remains NP-complete.<ref name=":0">{{Cite web|url=http://courses.csail.mit.edu/6.892/spring19/scribe/lec6.pdf|title=Algorithmic Lower Bounds: Fun With Hardness Proofs at MIT}}</ref>

=== Circuit UNSAT ===

Circuit UNSAT is the decision problem of determining whether a given Boolean circuit outputs false for all possible assignments of its inputs. This is the complement of the Circuit SAT problem, and is therefore [[Coco-NP-complete]].

==Reduction from CircuitSAT==

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* A split gadget. This gadget guarantees that all the output wires have the same value as the input wire.

* Gadgets simulating the gates of the circuit.

* A Truetrue terminator gadget. This gadget is used to force the output of the entire circuit to be Truetrue.

* A turn gadget. This gadget allows us to redirect wires in the right direction as needed.

* A crossover gadget. This gadget allows us to have two wires cross each other without interacting.

=== Minesweeper Inferenceinference Problemproblem ===

This problem asks whether it is possible to locate all the bombs given a [[Minesweeper (video game)|Minesweeper]] board. It has been proven to be [[Coco-NP-complete|CoNP-Complete]] via a reduction from Circuitcircuit UNSAT problem.<ref>{{Cite journal|last1=Scott|first1=Allan|last2=Stege|first2=Ulrike|last3=van Rooij|first3=Iris|date=2011-12-01|title=Minesweeper May Not Be NP-Complete but Is Hard Nonetheless|journal=The Mathematical Intelligencer|language=en|volume=33|issue=4|pages=5–17|doi=10.1007/s00283-011-9256-x|s2cid=122506352 |issn=1866-7414}}</ref> The gadgets constructed for this reduction are: wire, split, AND and NOT gates and terminator.<ref>{{cite journal | url=http://www.minesweeper.info/articles/MinesweeperIsNPComplete.pdf | last=Kaye|first=Richard | title=Minesweeper is NP-complete | journal=The Mathematical Intelligencer | volume=22 | number=2 | pages=9&ndash;15 | date=Mar 2000 | doi=10.1007/BF03025367| s2cid=122435790}}</ref> There are three crucial observations regarding these gadgets. First, the split gadget can also be used as the NOT gadget and the turn gadget. Second, constructing AND and NOT gadgets is sufficient, because together they can simulate the universal NAND gate. Finally, since three NANDs can be composed intersection-free to implement an XOR, and since XOR is enough to build a crossover,<ref>see [[:File:Crossover xor.gif]] and [[:File:Crossover nand.pdf]]</ref> this gives us the needed crossover gadget.

==The Tseytin transformation==

{{main|Tseytin transformation}}

The [[Tseytin transformation]] is a straightforward reduction from Circuit-SAT to [[Boolean satisfiability problem|SAT]]. The transformation is easy to describe if the circuit is wholly constructed out of 2-input [[Sheffer stroke|NAND gates]] (a [[Functional completeness|functionally-complete]] set of Boolean operators): assign every [[Netlist|net]] in the circuit a variable, then for each NAND gate, construct the [[conjunctive normal form]] clauses (''v₁'' ∨ ''v₃'') ∧ (''v₂'' ∨ ''v₃'') ∧ (¬''v₁'' ∨ ¬''v₂'' ∨ ¬''v₃''), where ''v₁'' and ''v₂'' are the inputs to the NAND gate and ''v₃'' is the output. These clauses completely describe the relationship between the three variables. Conjoining the clauses from all the gates with an additional clause constraining the circuit's output variable to be true completes the reduction; an assignment of the variables satisfying all of the constraints exists [[if and only if]] the original circuit is satisfiable, and any solution is a solution to the original problem of finding inputs that make the circuit output 1.<ref name="np-complete-problems" /><ref>{{cite web|url=http://reference.kfupm.edu.sa/content/a/l/algorithms_for_satisfiability_in_combina_410353.pdf|title=Algorithms for Satisfiability in Combinational Circuits Based on Backtrack Search and Recursive Learning|author=Marques-Silva, João P. and Luís Guerra e Silva|year=1999|url-status=dead|archive-url=https://web.archive.org/web/20220702105658/http://vinci.inesc.pt/~lgs/docs/iwls99.pdf|archive-date=2022-07-02}}</ref> The converse—that SAT is reducible to Circuitcircuit-SAT—follows trivially by rewriting the Boolean formula as a circuit and solving it.

==See also==

*[[Circuit Valuevalue Problemproblem]]

* Structured Circuitcircuit Satisfiabilitysatisfiability

* [[Satisfiability problem]]