X86 memory segmentation: Difference between revisions

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While real mode segments are ''technically'' always 64 [[Kilobyte|KB]] long, the practical effect is only that no segment can be ''longer'' than 64 KB, rather than that every segment as actually used in a program ''must'' be treated as 64 KB long – dealing with effectively smaller segments is possible: usable sizes range from 16 through 65,536 bytes, in 16-byte steps. Because there is no protection or privilege limitation in real mode, it is still entirely up to the program to coordinate and keep within the bounds of any segments. This is true both when a segment is programmatically treated as smaller than, or the full 64 KB, but it is also true that any program can always access any memory by just changing segments, since it can arbitrarily set segment selectors to change segment addresses with absolutely no supervision. Therefore, while real mode can be thought of as allowing different segment lengths, and as allowing segments to be overlapping or non-overlapping as desired, none of this is restrictively enforced by the CPU.
 
The effective 20-bit [[address space]] of PC/XT-generation CPUs limits the [[memory address|addressable memory]] to 2<sup>20</sup>&nbsp;bytes, or 1,048,576&nbsp;bytes (1&nbsp;[[MebibyteMegabyte|MiBMB]]). This derived directly from the hardware design of the Intel&nbsp;8086 (and, subsequently, the closely related 8088), which had exactly 20 [[address bus|address pins]]. (Both were packaged in 40-pin DIP packages; even with only 20 address lines, the address and data buses were multiplexed to fit all the address and data lines within the limited pin count.)
 
{{anchor|Paragraph}}{{resize|105%|{{sidebox|above='''Example calculation:'''|text=A segment value of 0Ch (12) would give a linear address at C0h (192) in the linear address space. The address offset can then be added to this number. 0Ch:0Fh (12:15) would be C0h+0Fh=CFh (192+15=207), CFh (207) being the linear address.}}}}Each segment begins at a multiple of 16&nbsp;bytes, called a ''paragraph'', from the beginning of the linear (flat) address space. That is, at 16&nbsp;byte intervals. Since all segments are technically 64&nbsp;KB long, this explains how overlap can occur between segments and why any ___location in the linear memory address space can be accessed with many segment:offset pairs. The actual ___location of the beginning of a segment in the linear address space can be calculated with ''segment'' × 16. Such address translations are carried out by the segmentation unit of the CPU.
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{{refimprove section|date=August 2015}}
 
[[Image:Protected mode segments.svg|thumb|300px|left|Three segments in [[protected mode]] memory (click on image to enlarge), with the '''local descriptor table'''.]]
 
=== 80286 protected mode ===
The [[Intel 80286|80286]]'s [[protected mode]] extends the processor's address space to 2<sup>24</sup> bytes (16 mebibytesmegabytes), but not by adjusting the shift value used to calculate a segment address from the value in a segment register. Instead, each 16-bit segment register now contains an index into a table of [[segment descriptors]] containing 24-bit base addresses to which offsets are added. To support old software, the processor starts up in "real mode", a mode in which it uses the segmented addressing model of the 8086. There is a small difference though: the resulting physical address is no longer truncated to 20&nbsp;bits, so [[real mode]] pointers (but not 8086 pointers) can now refer to addresses from 100000<sub>16</sub> through 10FFEF<sub>16</sub>. This nearly 64-kilobyte region of memory was known as the [[High Memory Area]] (HMA), and later versions of [[DOS]] could use it to increase the available "conventional" memory (i.e. within the first [[Megabyte|MB]]), by moving parts of DOS from conventional memory into the HMA. With the addition of the HMA, the total address space is approximately 1.06&nbsp;MB. Though the 80286 does not truncate real-mode addresses to 20&nbsp;bits, a system containing an 80286 can do so with hardware external to the processor, by gating off the 21st address line, the [[A20 line]]. The IBM&nbsp;PC&nbsp;AT provided the hardware to do this (for backward compatibility with software for the original [[IBM&nbsp;PC]] and [[IBM PC/XT|PC/XT]] models), and so all subsequent "[[IBM PC/AT|AT]]-class" PC clones did as well.
 
286 protected mode was seldom used as it would have excluded the large body of users with 8086/88 machines. Moreover, it still necessitated dividing memory into 64k segments like was done in real mode. This limitation can be worked around on 32-bit CPUs which permit the use of memory pointers greater than 64k in size, however as the Segment Limit field is only 24-bit long, the maximum segment size that can be created is 16MB (although paging can be used to allocate more memory, no individual segment may exceed 16MB). This method was commonly used on Windows 3.x applications to produce a flat memory space, although as the OS itself was still 16-bit, API calls could not be made with 32-bit instructions. Thus, it was still necessary to place all code that performs API calls in 64k segments.
 
Once 286 protected mode is invoked, it could not normally be exited except by performing a hardware reset. Machines following the rising [[IBM PC/AT]] standard could feign a reset to the CPU via the standardised keyboard controller, but this was significantly sluggish. Windows 3.x worked around both of these problems by intentionally triggering a [[triple fault]] in the interrupt-handling mechanisms of the CPU, which would cause the IBM AT-compatible hardware to reset the CPU, nearly instantly, thus causing it to drop back into real mode.<ref>{{Cite web|url=http://blogs.msdn.com/b/larryosterman/archive/2005/02/08/369243.aspx|title = DevBlogs}}</ref>
drop back into real mode.<ref>{{Cite web|url=http://blogs.msdn.com/b/larryosterman/archive/2005/02/08/369243.aspx|title = DevBlogs}}</ref>
 
=== Detailed segmentation unit workflow ===