Fast Analog Computing with Emergent Transient States: Difference between revisions

Content deleted Content added
No edit summary
 
(9 intermediate revisions by 9 users not shown)
Line 1:
{{OrphanNotability|date=FebruaryJanuary 20092021}}
'''Fast Analog Computing with Emergent Transient States''' or '''FACETS''' is a [[Europe]]an project to research the properties of the human brain. Established and funded by the [[European Union]] in September 2005, the five-year project involves approximately 80 scientists from Austria, France, Germany, Hungary, Sweden, Switzerland and the United Kingdom.
The FACETS project is a European Project funded by the [[European Union]] gathering scientists from different fields related to [[neuroscience]] ([[neurophysiology]], [[computational neuroscience]], neural hardware) aiming at advancing our knowledge on the computational properties of the brain. FACETS stands for "Fast Analog Computing with Emerging Transient States".
 
OneThe ofmain project goal is to address questions about how the plannedbrain objectivescomputes. Another objective is to obtaincreate microchip hardware ofequaling aroundapproximately 200,000 neurons with 50 million synapses built on a single silicon wafer. Current prototypes are running 100,000 times faster than their biological counterparts, which would make them the fastest analog computing devices ever built for neuronal computations.
Taking advantage of a concerted action of neuroscientists, computer scientists, engineers and physicists, the FACETS project aims to address the unsolved question of how the brain computes. It combines a substantial fraction of the European groups working in the field into a consortium of 15 groups from Austria, France, Germany, Hungary, Sweden, Switzerland and the UK. About 80 scientists join their efforts over a period of 5 years, starting in September 2005. A project of this dimension has rarely been carried out in the context of brain-science related work in Europe, in particular with such a strong interdisciplinary component.
 
The project involves 15 laboratories across Europe, combining neurophysiological experiments, computational and theoretical modeling and integrated circuit design. The institutions involved are the University of Heidelberg (K. Meier, coordinator) in Germany, the CNRS of Gif sur Yvette (Y. Fregnac, A. Destexhe) in France, the CNRS of Marseille (G. Masson) in France, the INRIA (O. Faugeras) in France, the University of Freiburg (A. Aertsen) in Germany, the University of Graz (W. Maass) in Austria, the EPFL of Lausanne (H. Markram, W. Gerstner) in Switzerland, the KTH of Stockholm (A. Lansner) in Sweden, the University of London (A. Thomson) in UK, the University of Plymouth (M. Denham) in UK, the University of Bordeaux (S. Renaud) in France, the University of Debrecen (Z. Kisvarday) in Hungary, the University of Dresden (R. Schüffny) in Germany and SCCH (T. Natschläger) in Austria. Many other researchers and about 80 PhD students are involved in the project.
 
One of the planned objectives is to obtain hardware of around 200,000 neurons with 50 million synapses built on a single silicon wafer. Current prototypes are running 100,000 times faster than their biological counterparts, which would make them the fastest analog computing devices ever built for neuronal computations.
 
The institutions involved are the [[University of Heidelberg]], the [[French National Centre for Scientific Research]] (CNRS) of Gif sur Yvette, the CNRS of Marseille, the [[Institut national de recherche en informatique et en automatique]], the [[University of Freiburg]], the [[University of Graz]], the [[École Polytechnique Fédérale de Lausanne]], the Swedish [[Royal Institute of Technology]], the [[University of London]], the [[University of Plymouth]], the [[University of Bordeaux]], the [[University of Debrecen]], the [[Dresden University of Technology|University of Dresden]] and the Institute for Theoretical Computer Science at Technische Universitat Graz.
 
==External links ==
Line 17 ⟶ 14:
[[Category:Neurophysiology]]
 
 
[[fr:Fast Analog Computing with Emergent Transient States]]
{{Compu-neuro-stub}}