512-bit computing: Difference between revisions

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{{Short description|Computer architecture bit width}}
{{Multiple issues|{{primary sources|date=July 2013}}{{More citations needed|date=April 2023}}}}
{{More citations needed|date=April 2023}}}}
{{n-bit|512|(64 [[octet (computing)|octets]])}}
 
There are currently no mainstream general-purpose [[CPU|processors]] built to operate on 512-bit integers or addresses, though a number of processors do operate on 512-bit data.
 
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A 512-bit register can store 2<sup>512</sup> different values. The range of [[integer]] values that can be stored in 512 bits depends on the [[Integer (computer science)#Value and representation|integer representation]] used.
 
The maximum value of a signed 512-bit integer is {{nowrap|2<sup>511</sup> &minus; 1}}, written in decimal as 6,{{zwsp}}|6,|703,{{zwsp}}|903,{{zwsp}}|964,{{zwsp}}|971,{{zwsp}}|298,{{zwsp}}|549,{{zwsp}}|787,{{zwsp}}|012,{{zwsp}}|499,{{zwsp}}|102,{{zwsp}}|923,{{zwsp}}|063,{{zwsp}}|739,{{zwsp}}|682,{{zwsp}}|910,{{zwsp}}|296,{{zwsp}}|196,{{zwsp}}|688,{{zwsp}}|861,{{zwsp}}|780,{{zwsp}}|721,{{zwsp}}|860,{{zwsp}}|882,{{zwsp}}|015,{{zwsp}}|036,{{zwsp}}|773,{{zwsp}}|488,{{zwsp}}|400,{{zwsp}}|937,{{zwsp}}|149,{{zwsp}}|083,{{zwsp}}|451,{{zwsp}}|713,{{zwsp}}|845,{{zwsp}}|015,{{zwsp}}|929,{{zwsp}}|093,{{zwsp}}|243,{{zwsp}}|025,{{zwsp}}|426,{{zwsp}}|876,{{zwsp}}|941,{{zwsp}}|405,{{zwsp}}|973,{{zwsp}}|284,{{zwsp}}|973,{{zwsp}}|216,{{zwsp}}|824,{{zwsp}}|503,{{zwsp}}|042,{{zwsp|047}}047, or (approximately {{val|6.7039 x 10<sup>|e=153</sup>}}).
 
== Hardware ==
[[File:Sapphire Radeon R9 290X-front oblique PNr°0437.jpg|thumb|The AMD [[Radeon R9]] 290X (Sapphire OEM version pictured here) uses a 512 -bit memory bus.]]
The Intel [[Xeon Phi]] has a [[vector processing unit]] with 512-bit vector registers, each one holding sixteen [[32-bit computing|32-bit]] elements or eight [[64-bit computing|64-bit]] elements, and one instruction can operate on all these values in parallel. However, the Xeon Phi's vector processing unit does not operate on individual numbers that are 512 bits long.<ref>{{cite web|url=https://software.intel.com/sites/default/files/managed/09/07/xeon-phi-coprocessor-system-software-developers-guide.pdf|title=Intel Xeon Phi Coprocessor System Software Developers Guide|publisher=[[Intel]]|date=March 2014|access-date=April 30, 2019}}</ref>
 
Some GPUs, such as the [[Advanced Micro Devices]] (AMD) [[Radeon HD 2000 series#Radeon HD 2900|Radeon HD 2900XT]], the [[Nvidia]] GTX 280,<ref>{{cite web|url=http://www.geforce.com/hardware/desktop-gpus/geforce-gtx-280/specifications |title=GTX 280: Specifications |publisher=GeForce |access-date=2013-08-13}}</ref> GTX 285,<ref>{{cite web|url=http://www.geforce.com/hardware/desktop-gpus/geforce-gtx-285/specifications |title=GTX 285: Specifications |publisher=GeForce |access-date=2013-08-13}}</ref> Quadro FX 5800,<ref>{{cite web|url=http://www.nvidia.com/object/product_quadro_fx_5800_us.html |title=Nvidia Quadro FX 5800 provides professionals with visual supercomputing from their desktops delivering results that push visualization beyond traditional 3D |publisher=Nvidia.com |access-date=2013-08-13 |archive-url=https://web.archive.org/web/20190611163640/http://www.nvidia.com/object/product_quadro_fx_5800_us.html |archive-date=2019-06-11 |url-status=dead}}</ref> and several [[Nvidia Tesla]] products, move data across a 512-bit memory bus. Then [[AMD Radeon Rx 200 Series#Radeon R9 290|AMD Radeon R9 290, R9 290X and 295X2]] followed.
 
[[AVX-512]] are 512-bit extensions to the 256-bit [[Advanced Vector Extensions]] SIMD instructions for x86 [[instruction set architecture]] proposed by Intel in July 2013, and released onin 2016 with [[Xeon Phi#Knights Landing|Knights Landing]], and in 2017 on the HEDT and consumer server platform, with Skylake-X and [[Skylake (microarchitecture)#Skylake-SP (14 nm) Scalable Performance|Skylake-SP]] respectively.
 
== Software ==