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{{Machine code}}
In a [[Instruction set architecture|computer instruction set architecture (ISA)]], an '''execute instruction''' is a [[machine code|machine language instruction]] which treats data as a machine instruction and executes it.
It can be considered a fourth mode of instruction sequencing after [[program counter|ordinary sequential execution]], [[branch (computer science)|branching]], and [[interrupt]]ing.<ref name="brooks">{{cite journal|first=F.P.|last=Brooks|author-link=Fred Brooks|title=The execute operations—a fourth mode of instruction sequencing|journal=Communications of the ACM|volume=3|issue=3|pages=168–170|date=March 1960|doi=10.1145/367149.367168|s2cid=37725430|doi-access=free}}</ref> Since it is an instruction that operates on other instructions like the [[repeat instruction]], it has also been classified as a meta-instruction.<ref>{{cite journal|first=George E.|last=Rossman|title=A Course of Study in Computer Hardware Architecture|journal=IEEE Computer|volume=8|issue=12|pages=44–63|date=December 1975|doi=10.1109/C-M.1975.218835|s2cid=977792}}, p. 50<!--no way to mention specific page as well as page range in Cite journal template?--></ref>
==Computer models==
Many computer families introduced in the 1950s and 1960s include ''execute'' instructions: the [[IBM 709]]<ref name="brooks"/> and [[IBM 7090]] ([[Assembly language#Mnemonics|op code mnemonic]]: {{mono|XEC}}),<ref>{{cite manual|publisher=[[IBM]]|title=Reference Manual, IBM 7090 Data Processing System|date=March 1962|page=36|url=http://www.bitsavers.org/pdf/ibm/7090/22-6528-4_7090Manual.pdf}}</ref> the [[IBM 7030 Stretch]] ({{mono|EX}}, {{mono|EXIC}}),<ref>{{cite manual|publisher=[[IBM]]|title=Reference Manual, 7030 Data Processing System|date=August 1961|page=50|url=http://bitsavers.org/pdf/ibm/7030/22-6530-2_7030RefMan.pdf}}</ref><ref name="brooks"/> the [[PDP-1]]/[[PDP-4|-4]]/[[PDP-7|-7]]/[[PDP-9|-9]]/[[PDP-15|-15]] ({{mono|XCT}}),<ref>{{cite manual|publisher=[[Digital Equipment Corporation]]|title=Programmed Data Processor-1 Manual|date=1961|page=14|url=http://gordonbell.azurewebsites.net/digital/pdp%201%20manual%201961.pdf}}</ref><ref>{{cite web|first=Bob|last=Supnik|title=Architectural Evolution in DEC's 18b Computers|page=8 (page numbers not shown)|url=http://simh.trailing-edge.com/docs/architecture18b.pdf}}</ref> the [[UNIVAC 1100/2200 series|UNIVAC 1100/2200]] ({{mono|EXRI}}),<ref>{{cite manual
|url=http://www.bitsavers.org/pdf/univac/1107/UT-2463_CPU_Nov61.pdf
|title=Univac 1107 Central Computer |date=November 1961|page=12{{hyphen}}1}}</ref> the [[CDC 1604#The 924|CDC 924]] ({{mono|XEC}}),<ref name=924Man>{{cite manual
|url=http://bitsavers.informatik.uni-stuttgart.de/pdf/cdc/924/168B_CDC_924_Reference_Manual_Oct62.pdf
|title=Control Data 924 Computer Reference Manual |date=October 1962|page=2{{hyphen}}41}}</ref> the [[PDP-6]]/[[PDP-10|-10]] ({{mono|XCT}}), the [[IBM System/360]] ({{mono|EX}}),<ref name="s360">{{cite manual|publisher=[[IBM]]|title=IBM System/360 Principles of Operation|id=A22-6821-0|date=1964|page=65|url=http://bitsavers.trailing-edge.com/pdf/ibm/360/princOps/A22-6821-0_360PrincOps.pdf}}</ref><!--16, 32, or 48--> the [[GE-600 series|GE-600]]/[[Honeywell 6000 series|Honeywell 6000]] ({{mono|XEC}}, {{mono|XED}}),<ref name="GE635">{{cite manual|publisher=General Electric Computer Department|title=GE-635 System Manual|date=July 1964|page=A{{hyphen}}5|url=http://www.bitsavers.org/pdf/ge/GE-6xx/CPB-371A_GE-
Fewer 1970s designs include ''execute'' instructions
|url=http://lansdale.com/datasheets/sl8x305_rev0.pdf|publisher=Lansdale Semiconductor Inc.|accessdate=20 June 2017}}</ref> An ''execute'' instruction was proposed for the [[PDP-11]] in 1970,<ref name="pdp11x">{{cite web |last=van de Goor |first=Ad |date=September 21, 1970 |title=The Execute Instruction |url=http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/pdp11/memos/700921_The_Execute_Instruction.pdf |id=PDP-11/40 Technical Memorandum 18}}</ref> but never implemented for it<ref name="pdp11">{{cite manual |url=http://bitsavers.org/pdf/dec/pdp11/handbooks/PDP11_Handbook1979.pdf |title=PDP11 Processor Handbook: PDP11/04/34a/44/60/60 |date=1979 |publisher=[[Digital Equipment Corporation]]}}</ref> or its successor, the [[VAX]].<ref>{{cite manual |url=https://www.ece.lsu.edu/ee4720/doc/vax.pdf |title=VAX MACRO and Instruction Set Reference Manual |date=April 2001 |publisher=[[Compaq Computer Corporation]] |id=AA-PS6GD-TE}}</ref>
Modern instruction sets do not include ''execute'' instructions because they interfere with [[instruction pipeline|pipelining]], [[Prefetch input queue|prefetching]], and other optimizations.{{citation needed|date=July 2021}}
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The ''execute'' instruction can cause several problems when one ''execute'' instruction points to another one and so on:
* the processor may be
* similarly, the processor may go into an infinite loop if the series of ''execute'' instructions is circular and
* if the ''execute'' instructions are on different [[Page (computer memory)|swap pages]], all of the pages need to be swapped in for the instruction to complete, which can cause [[thrashing (computer science)|thrashing]].
Similar issues arise with [[Addressing mode#multilevel memory indirect|multilevel indirect addressing modes]].
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The ''execute'' instruction has several applications:<ref name="brooks"/>
* Functioning as a single-instruction [[subroutine]]
* [[Late binding]]
** Implementation of [[call by name]] and other [[thunks]].<ref name="brooks"/>
** A table of execute targets may be used for [[dynamic dispatch]] of the [[method (computer science)|methods]] or [[virtual function]]s of an [[object (computer science)|object]] or [[class (computer science)|class]], especially when the method or function may often be implementable as a single instruction.<ref name="pdp11"/>
** An execute target may contain a [[hooking|hook]] for adding functionality or for debugging; it is normally initialized as a [[NOP (code)|NOP]] which may be overridden dynamically.
** An execute target may change between a fast version of an operation and a fully traced version.<ref>{{cite book|first=Richard P.|last=Gabriel|author-link=Richard P. Gabriel|title=Performance and Evaluation of Lisp Systems|date=August 1985|isbn=9780262070935|page=32|publisher=MIT Press |url=https://www.dreamsongs.com/Files/Timrep.pdf}}</ref><ref>{{cite manual|first=Kent M.|last=Pitman|author-link=Kent Pitman|title=The Revised Maclisp Manual, Sunday Morning Edition|url=https://www.maclisp.info/pitmanual/|section-url=https://www.maclisp.info/pitmanual/system.html#PURE|section=PURE}}</ref><ref>{{cite manual|first=David A.|last=Moon|author-link=David A. Moon|title=Maclisp Reference Manual|version=Revision 0|date=April 1974|page=181|url=http://www.softwarepreservation.com/projects/LISP/MIT/Moon-MACLISP_Reference_Manual-Apr_08_1974.pdf}}</ref>
* Tracing, monitoring, and emulation
** This may maintain a pseudo-[[program counter]], leaving the normal program counter unchanged.<ref name="brooks"/>
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* Emulating self-modifying code, especially when it must be [[reentrancy (computing)|reentrant]] or read-only.<ref name="pdp11x"/>
* In the IBM System/360, the ''execute'' instruction can modify bits 8-15 of the target instruction, effectively turning an instruction with a fixed argument (e.g., a length field) into an instruction with a variable argument.
* Privileged-mode ''execute'' instructions as on the KL10 are used by [[Kernel (operating
==Notes==
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