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In 2023 Microsoft introduced CHERIoT,<ref name="cheriot"/> a [[RISC-V]] CHERI adaptation optimised for small embedded devices. CHERIoT incorporated ideas from Cornucopia and memory colouring techniques such as SPARC ADI and Arm MTE to enhance security. As part of the UKRI-funded Sunburst project, lowRISC launched the Sonata platform to advance RISC-V-based CHERI development and support standardisation efforts. Both the CHERI RISC-V research work and CHERIoT fed into the standardisation process for an official CHERI family of RISC-V extensions.<ref name=":2">{{cite web |title=CHERI Ratification Plan |url=https://lf-riscv.atlassian.net/wiki/spaces/CTXX/pages/47022116/CHERI+Ratification+Plan |access-date=10 January 2025}}</ref> [[Codasip]] announced that they had RISC-V IP cores with CHERI extensions available to license.<ref>{{cite web |url=https://www.eenewseurope.com/en/codasip-delivers-first-commercial-cheri-processor-using-risc-v/ |publisher=eeNews |access-date=20 January 2025 |title=Codasip delivers first commercial CHERI processor using RISC-V |date=2 November 2023}}</ref>
The CHERI Alliance was launched in 2024.<ref>{{Cite web |last=Flaherty |first=Nick |date=2024-11-12 |title=CHERI builds global chip security alliance |url=https://www.eenewseurope.com/en/cheri-builds-global-chip-security-alliance/ |access-date=2025-07-22 |website=eeNews Europe |language=en-US}}</ref> This non-profit organisation was formed by a number of high-tech companies to accelerate CHERI adoption. It provides a platform for collaboration and helps the technology become more visible and easier to use. Its goal is to aggregate the ecosystem and welcomes members interested in CHERI, from commercial companies to universities, research centres, and open-source communities. It is organised in working groups<ref>{{Cite web |title=CHERI Alliance – Working Groups |url=https://cheri-alliance.org/who-we-are/working-groups/ |access-date=2025-07-22 |website=CHERI Alliance |language=en-US}}</ref> that focus on specific themes (operating systems porting, tools, design recommendations...). It also organises conferences focused on CHERI<ref>{{Cite web |title=CHERI Alliance – Events |url=https://cheri-alliance.org/events/ |access-date=2025-07-22 |website=CHERI Alliance |language=en-US}}</ref> and participates to a number of events to promote the technology.
By 2024 SCI Semiconductors announced ICENI,<ref name=iceni>{{cite web |last1=Flaherty |first1=Nick |date=23 October 2024 |title=First CHERI RISC-V embedded chip and Early Access Programme |url=https://www.eenewseurope.com/en/first-cheri-risc-v-embedded-chip-and-early-access-programme/ |access-date=11 January 2025 |publisher=eeNews Europe}}</ref> a CHERIoT-compatible chip designed specifically for secure embedded systems. Codasip is actively developing a Linux kernel implementation for the RISC-V architecture.<ref>{{cite web |url=https://codasip.com/press-release/2024/10/21/codasip-enables-secure-linux-by-donating-cheri-risc-v-sdk-to-the-cheri-alliance/ |title=Codasip enables secure Linux by donating CHERI RISC-V SDK to the CHERI Alliance |publisher=Codasip |date=21 October 2024 |access-date=20 January 2025}}</ref> The CHERI Alliance, a non-profit organisation based in Cambridge, UK, was established to promote the adoption of CHERI technology and its integration into secure digital products and systems, including Google as a founding member.<ref name="cheri-alliance-launched"/>▼
▲By 2024 SCI Semiconductors announced ICENI,<ref name="iceni">{{cite web |last1=Flaherty |first1=Nick |date=23 October 2024 |title=First CHERI RISC-V embedded chip and Early Access Programme |url=https://www.eenewseurope.com/en/first-cheri-risc-v-embedded-chip-and-early-access-programme/ |access-date=11 January 2025 |publisher=eeNews Europe}}</ref> a CHERIoT-compatible chip designed specifically for secure embedded systems. Codasip is actively developing a Linux kernel implementation for the RISC-V architecture.<ref>{{cite web |url=https://codasip.com/press-release/2024/10/21/codasip-enables-secure-linux-by-donating-cheri-risc-v-sdk-to-the-cheri-alliance/ |title=Codasip enables secure Linux by donating CHERI RISC-V SDK to the CHERI Alliance |publisher=Codasip |date=21 October 2024 |access-date=20 January 2025}}</ref> The CHERI Alliance, a non-profit organisation based in Cambridge, UK, was established to promote the adoption of CHERI technology and its integration into secure digital products and systems, including Google as a founding member.<ref name="cheri-alliance-launched" />
In 2025 Wyvern Global's Semiconductors Division announced WARP <ref name=WARP>{{cite web |date=11 July 2025 |title=Wyvern Advanced RISC-V Processor |url=https://warp.wyvern.global/ |access-date=11 July 2025 |publisher=Wyvern Global}}</ref>, the first commercially available CHERI-BSD native RISC-V chipset built from the ground up with CHERI in mind, and announced an OEM adoption programme under the same name for existing manufacturer's to integrate the technology into their existing boards using the WARP chipset. They have also pledged adoption of CHERI into all of their existing products and services end-to-end going forward and joined the CHERI alliance C.I.C <ref name=Wyvern Global Joins CHERI Alliance>{{cite web |date=11 July 2025 |title=Wyvern_Global_Joins_CHERI_alliance |url=https://cheri-alliance.org/member/wyvern-global/ |access-date=11 July 2025 |publisher=CHERI Alliance}}</ref>▼
▲In 2025 Wyvern Global's Semiconductors Division announced WARP
==References==
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