Pulse transition detector: Difference between revisions

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{{short description|Flip-flop logic gate}}

{{Orphan|date=November 2006}}

{{Unreferenced|date=December 2009}}

A '''Pulse transition detector''' (PTD) is a device comprised of an [[AND gate]] and a [[NOT gate]] used in edge triggered [[Flip flop]]s

A '''pulse transition detector'''<ref>{{cite web |title=T Is for Toggle: Understanding the T Flip-Flop - Technical Articles |url=https://www.allaboutcircuits.com/technical-articles/t-is-for-toggle-understanding-the-t-flip-flop/ |website=allaboutcircuits.com |access-date=22 July 2025 |language=en}}</ref> is used in [[Flip-flop (electronics)|flip flops]] in order to achieve [[signal edge|edge]] triggering in the [[Electronic circuit|circuit]]. It merely converts the [[clock signal]]'s rising edge to a very narrow pulse.

The PTD consists of a delay gate (which delays the clock signal) and the clock signal itself passed through a [[NAND gate]] and then inverted.

When a pulse reaches its input it sends a spike through the output, this spike causes the flip-flop to change state on the positive edge of the pulse

The benefit of edge triggering is that it removes the problems of zeroes and ones catching associated with pulse triggered flip-flops (e.g. [[Flip-flop_(electronics)#Master–slave edge-triggered D flip-flop|master slave flip flops]]).

==References==

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[[Category:Logic gates]]

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