Cycles per instruction: Difference between revisions

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{{Short description|Aspect of CPU performance}}

{{Refimprove|date=December 2009}}

In [[computer architecture]], '''cycles per instruction''' (aka '''clock cycles per instruction''', '''clocks per instruction''', or '''CPI''') is one aspect of a [[central processing unit|processor's]]'s performance: the average number of [[clock cycle]]s per [[Instruction (computer science)|instruction]] for a program or program fragment.<ref>{{cite book |title=Computer Organization and Design: The Hardware/Software Interface|url=https://archive.org/details/computerorganiza00henn|url-access=registration|firstfirst1=David A.|last1=Patterson|first2=John L.|last2=Hennessy|year=1994|publisher=Morgan Kaufmann |isbn=9781558602816}}</ref> It is the [[multiplicative inverse]] of [[instructions per cycle]].

== Definition ==

The average of Cycles Per Instruction in a given process ({{math|CPI}}) is defined by the following [[Weighted arithmetic mean|weighted average]]:

: <math>

\mathrm{CPI} := \frac{\Sigma_i(\mathrm{IC}_i)(\mathrm{CC}_i)}{\mathrm{IC}} = \frac{\Sigma_i(\mathrm{IC}_i \cdot \mathrm{CC}_i)}{\Sigma_i(\mathrm{IC}_i)}

CPI = \frac{\Sigma_i(IC_i)(CC_i)}{IC}

</math>

Where <math>IC_i\mathrm{IC}_i</math> is the number of instructions for a given instruction type <math>i</math>, <math>CC_i\mathrm{CC}_i</math> is the clock-cycles for that instruction type and <math>\mathrm{IC}=\Sigma_i(IC_i\mathrm{IC}_i)</math> is the total instruction count. The summation sums over all instruction types for a given benchmarking process.

==Explanation==

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For the multi-cycle [[MIPS architecture|MIPS]], there are five types of instructions:

* Load (105 cycles)

* Store (94 cycles)

* [[MIPS architecture#MIPS assembly language|R-type]] (84 cycles)

* [[MIPS architecture#MIPS assembly language|Branch]] (73 cycles)

* [[MIPS architecture#MIPS assembly language|Jump]] (63 cycles)

If a program has: