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{{Short description|Computer memory architecture}}
[[File:ComputerMemoryHierarchy.svg|thumb|300px|Diagram of the computer memory hierarchy]]
{{Memory types}}
{{distinguish|Learning pyramid}}
In [[computer architecture]], the '''memory hierarchy''' separates [[computer storage]] into a hierarchy based on [[Response time (technology)|response time]]. Since response time, [[Computational complexity|complexity]], and [[Computer data storage|capacity]] are related, the levels may also be distinguished by their [[Computer performance|performance]] and controlling technologies.<ref name="toyzee" /> Memory hierarchy affects performance in computer architectural design, algorithm predictions, and lower level [[computer programming|programming]] constructs involving [[locality of reference]].
Designing for high performance requires considering the restrictions of the memory hierarchy, i.e. the size and capabilities of each component. Each of the various components can be viewed as part of a hierarchy of memories {{math|(''m''<sub>1</sub>, ''m''<sub>2</sub>, ..., ''m<sub>n</sub>'')}} in which each member {{mvar|m<sub>i</sub>}} is typically smaller and faster than the next highest member {{math|''m''<sub>''i''+1</sub>}} of the hierarchy. To limit waiting by higher levels, a lower level will respond by filling a buffer and then signaling for activating the transfer.
There are four major storage levels.<ref name="toyzee">{{cite book
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* ''Internal''
* Main
* On-line mass storage
* Off-line bulk storage
This is a general memory hierarchy structuring. Many other structures are useful. For example, a paging algorithm may be considered as a level for [[virtual memory]] when designing a [[computer architecture]], and one can include a level of [[nearline storage]] between online and offline storage.
==Properties of the technologies in the memory hierarchy==
* Adding complexity slows
* CMOx memory technology stretches the
|title = Memory Hierarchy
|url = http://www.unitysemi.com/applications-memory-hierarchy.html
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* Latency and bandwidth are two metrics associated with caches. Neither of them is uniform, but is specific to a particular component of the memory hierarchy.<ref name=sun>{{Cite journal | first = Ruud | last = van der Pas | title = Memory Hierarchy in Cache-Based Systems | url = http://www.sun.com/blueprints/1102/817-0742.pdf | year = 2002 | page = 26 | place = Santa Clara, California | publisher = [[Sun Microsystems]] | id = 817-0742-10}}</ref>
* Predicting where in the memory hierarchy the data resides is difficult.<ref name=sun />
*
==Examples==
[[File:Hwloc.png|thumb|right|300px|Memory hierarchy of an AMD Bulldozer server
The number of levels in the memory hierarchy and the performance at each level has increased over time. The type of memory or storage components also change historically.<ref>{{cite web|url=http://www.computerhistory.org/timeline/memory-storage/|title=Memory & Storage
* [[Processor register]]s
* [[CPU cache|Cache]]
** Level 0 (L0), [[
** Level 1 (L1) [[Opcode|
** Level 1 (L1)
** Level 2 (L2)
** Level 3 (L3)
** Level 4 (L4)
* [[Computer memory|Main memory]] ([[
* [[
* [[Nearline storage]] ([[
* [[Offline storage]]
The lower levels of the hierarchy{{dash}}from
* Online storage is immediately available for I/O.
* Nearline storage is not immediately available, but can be made online quickly without human intervention.
* Offline storage is not immediately available, and requires some human intervention to bring online.
For example, always-on spinning disks are online, while spinning disks that spin
Most modern [[Central processing unit|CPUs]] are so fast that, for most program workloads, the [[wikt:bottleneck|bottleneck]] is the [[locality of reference]] of memory accesses and the efficiency of the [[CPU cache|caching]] and memory transfer between different levels of the hierarchy{{Citation needed|date=September 2009}}. As a result, the CPU spends much of its time idling, waiting for memory I/O to complete. This is sometimes called the ''space cost'', as a larger memory object is more likely to overflow a small
Modern [[programming language]]s mainly assume two levels of memory, main (''working'') memory and
*''Programmers'' are responsible for moving data between disk and memory through file I/O.
*''Hardware'' is responsible for moving data between memory and caches.
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