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{{Short description|Temporal logic}}
'''Property Specification Language''' ('''PSL''') is a [[temporal logic]] extending [[
PSL was initially developed by [[Accellera]] for specifying [[Property (philosophy)|properties]] or [[assertion (computing)|assertions]] about hardware designs. Since September 2004 the [[standardization|standard]]ization on the language has been done in [[IEEE]] 1850 working group. In September 2005, the IEEE 1850 Standard for Property Specification Language (PSL) was announced.
== Syntax and
PSL can express that if some scenario happens now, then another scenario should happen some time later. For instance, the property "a {{
<
</syntaxhighlight>
The property "every {{
<
A trace satisfying this formula is given in the figure on the right.
[[File:The trigger operator - slide 1.jpg|thumb|a simple trace satisfying <
PSL's temporal operators can be roughly classified into ''LTL-style'' operators and ''regular-expression-style'' operators. Many PSL operators come in two versions, a strong version, indicated by an exclamation mark suffix ( {{
=== SERE-style
The most commonly used PSL operator is the "suffix-implication" operator (
[[File:The trigger operator - slide 2.jpg|thumb|path satisfying ''r triggers p'' in two non-overlapping ways]]
[[File:The trigger operator - slide 3.jpg|thumb|path satisfying ''r triggers p'' in two overlapping ways]]
[[File:The trigger operator - slide 4.jpg|thumb|path satisfying ''r triggers p'' in three ways]]
The regular expressions of PSL have the common operators for concatenation (
The trigger operator comes in several variations, shown in the table below.
Here {{
{| class="wikitable"
| <
| if there is a match of s, then there is a match of t on the suffix of the trace,
*t starts the cycle after s ends,
*the match of t must reach to its end
|-
| <
| if there is a match of s, then there is a match of t on the suffix of the trace,
*t starts the same cycle that s ends,
*the match of t must reach to its end
|-
| <
| if there is a match of s, then there is a match of t on the suffix of the trace,
*t starts the cycle after s ends,
*the match of t may "get stuck" in the middle
|-
| <
| if there is a match of s, then there is a match of t on the suffix of the trace,
*t starts the same cycle that s ends,
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Operators for concatenation, fusion, union, intersection and their variations are shown in the table below.
Here {{
{| class="wikitable"
| <code> s ; t </code>
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| match of s followed by a match of t, t starts the same cycle that s ends
|-
| <
| match of s or match of t
|-
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|-
| <code> s within t </code>
| match of s within a match of t, abbreviation of ([*]; s; [*]) &&
|-
|}
Operators for consecutive repetitions are shown in the table below.
Here {{
{| class="wikitable"
| <code> s[*i] </code>
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|}
Operators for non-consecutive repetitions are shown in the table below.
Here {{
{| class="wikitable"
| <code> b[=i] </code>
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*equivalent to (!b[*];b)[*i]; !b[*]
|-
| <
| at least i and
*equivalent to (!b[*];b)[*i..j]; !b[*]
|-
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*equivalent to (!b[*];b)[*i..]; !b[*]
|-
| <
| m not necessarily consecutive repetitions of b ending with b,
*equivalent to (!b[*];b)[*m]
|-
| <code> b[->m:n] </code>
| at least m and
*equivalent to (!b[*];b)[*m..n]
|-
| <code> b[->m..] </code>
| at least m not necessarily consecutive repetitions of b ending with b,
*equivalent to (!b[*];b)[*
|-
| <code> b[->] </code>
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|}
=== LTL-style
Below is a sample of some LTL-style operators of PSL.
Here {{
{| class="wikitable"
| {{code|always p}}
| property p holds on every time point
|-
| {{code|never p}}
| property p does not
|-
| {{code|eventually! p}}
| there exists a future time point where p holds
|-
| {{code|next! p}}
| there exists a next time point, and p holds on this point
|-
| {{code|next p}}
| if there exists a next time point, then p holds on this point
|-
| {{code|next![n] p}}
| there exists an n-th time point, and p holds on this point
|-
| {{code|next[n] p}}
| if there exists an n-th time point, then p holds on this point
|-
| {{code|next_e![m..n] p}}
| there exists a time point, within m-th to n-th from the current where p holds.
|-
| {{code|next_e[m..n] p}}
| if there exists at least n-th time points, then p holds on one of the m-th to n-th points.
|-
| {{code|next_a![m..n] p}}
| there exists at least n more time points and p holds in all the time points between the m-th to the n-th, inclusive.
|-
| {{code|next_a[m..n] p}}
| p holds on all the next m-th through n-th time points, however many exist
|-
| {{code|p until! q}}
| there exists a time point where q holds, and p hold up until that time point
|-
| {{code|p until q}}
| p holds up until a time point where q hold, if such exists
|-
| {{code|p until!_ q}}
| there exists a time point where q holds, and p
|-
| {{code|p
| p holds up until a time point where q
|-
| {{code|p before! q}}
| p holds strictly before the time point where q holds, and p eventually holds
|-
| {{code|p before q}}
| p holds strictly before the time point where q holds, if p never holds, then neither does q
|-
| {{code|p before!_ q}}
| p holds before or at the same time point where q holds, and p eventually holds
|-
| {{code|p before_ q}}
| p holds before or at the same time point where q holds, if p never holds, then neither does q
|-
|}
===
Sometimes it is desirable to change the definition of the ''next time-point'', for instance in multiply-clocked designs, or when a higher
[[File:Need for multiple clocks.jpg|thumb|path and formula showing need for a sampling operator]]
The first property states that "every {{
<
But sometimes it is desired to consider only the cases where the above signals occur on a cycle where {{
This is depicted in the second figure in which although the formula
<
uses {{
[[File:Multiple clocks.jpg|thumb|path and formula showing effect of the sampling operator @]]
The semantics of formulas with nested @ is a little subtle. The interested reader is referred to [2].
===
PSL has several operators to deal with truncated paths (finite paths that may correspond to a prefix of the computation). Truncated paths occur in bounded-model checking, due to resets and in many other scenarios. The abort operators, specify how eventualities should be dealt with when a path has been truncated. They rely on the truncated semantics proposed in [1].
Here {{
{| class="wikitable"
| <code> p async_abort b </code>
| either p holds or p does not fail up until b holds
* b recognized asynchronously
|-
| <code> p sync_abort b </code>
| either p holds or p does not fail up until
* b recognized synchronously
|-
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|}
===Expressive
PSL subsumes the temporal logic [[Linear temporal logic|LTL]] and extends its expressive power to that of the [[omega-regular languages]]. The augmentation in expressive power, compared to that of LTL, which has the expressive power of the star-free ω-regular expressions, can be attributed to the ''suffix implication'',
===Layers===
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*{{Cite book| title = 1850-2010 – IEEE Standard for Property Specification Language (PSL)| doi = 10.1109/IEEESTD.2010.5446004| year = 2010| isbn = 978-0-7381-6255-3}}
**IEC 62531:2012 {{Cite book| title = 62531-2012 – IEC 62531:2012(E) (IEEE Std 1850-2010): Standard for Property Specification Language (PSL)| doi = 10.1109/IEEESTD.2012.6228486| year = 2012| isbn = 978-0-7381-7299-6}}
*{{cite book|doi=10.1007/978-3-540-45069-6_3|chapter=Reasoning with Temporal Logic on Truncated Paths|title=[[Computer Aided Verification]]|volume=2725|pages=27|series=Lecture Notes in Computer Science|year=2003|last1=Eisner|first1=Cindy|last2=Fisman|first2=Dana|author2-link=Dana Fisman|last3=Havlicek|first3=John|last4=Lustig|first4=Yoad|last5=McIsaac|first5=Anthony|last6=Van Campenhout|first6=David|isbn=978-3-540-40524-5|chapter-url=http://www.research.ibm.com/people/e/eisner/papers/cav49.pdf}}
*{{cite book|doi=10.1007/3-540-45061-0_67|chapter=The Definition of a Temporal Clock Operator|title=Automata, Languages and Programming|volume=2719|pages=857|series=Lecture Notes in Computer Science|year=2003|last1=Eisner|first1=Cindy|last2=Fisman|first2=Dana|author2-link=Dana Fisman|last3=Havlicek|first3=John|last4=McIsaac|first4=Anthony|last5=Van Campenhout|first5=David|isbn=978-3-540-40493-4|chapter-url=http://www.cis.upenn.edu/~fisman/documents/EFHMV_ICALP03_full.pdf}}
==External links==
* [http://www.eda.org/ieee-1850 IEEE 1850 working group]
* [https://web.archive.org/web/20051210035642/http://standards.ieee.org/announcements/pr_1850psl.html IEEE Announcement September 2005]
* [http://www.accellera.org/ Accellera]
* [http://www.project-veripage.com/psl_tutorial_1.php Property Specification Language Tutorial]
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===Books on PSL===
* [http://www.systemverilog.us/psl_info.html Using PSL/Sugar for Formal and Dynamic Verification 2nd Edition, Ben Cohen, Ajeetha Kumari, Srinivasan Venkataramanan]
* [
{{Programmable Logic}}
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[[Category:Formal specification languages]]
[[Category:IEEE DASC standards]]
[[Category:IEC standards
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