Atmel AVR instruction set: Difference between revisions

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Instruction encoding: Made field descriptions more concise by combining source & destination register fields. Mention super-common split source register field. List a few more unassigned opcodes.
Status register: Added article link to Exclusive OR function
 
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{{Short description|Microcontroller machine language}}
{{how-to|date=June 2014}}
{{main article|Atmel AVR}}
 
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# N [[Negative flag]]. Set to a copy of the most significant bit of an arithmetic result.
# V [[Overflow flag]]. Set in case of two's complement overflow.
# S Sign flag. Unique to AVR, this is always N⊕VN[[Exclusive or|⊕]]V, and shows the true sign of a comparison.
# H [[Half-carry flag]]. This is an internal carry from additions and is used to support [[Binary-coded decimal|BCD]] arithmetic.
# T Bit copy. Special bit load and bit store instructions use this bit.
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There are two special cases which exist to facilitate multi-byte arithmetic:
* The <code>INC</code> and <code>DEC</code> instructions do ''not'' modify the carry flag, so they may be used to loop over [[arbitrary-precision arithmetic]] operands.<ref name="isa_manual">{{cite web |url=httphttps://ww1.microchip.com/downloads/en/devicedocDeviceDoc/atmelAVR-0856InstructionSet-avrManual-instruction-set-manualDS40002198.pdf |title=AVR Instruction Set Manual |date=November 2016 |publisher=Atmel |id=Atmel-0856L}}</ref>{{Rp|84,101}}
* The <code>CPC</code>, <code>SBC</code> and <code>SBCI</code> (compare/subtract with carry) instructions do ''not'' set the Z flag when the result is zero, but only clear it if the result is non-zero.{{r|isa_manual|p=79,147,149}} For ''fixed'' precision multi-byte comparisons, implemented with an [[Loop unrolling|unrolled]] <code>CP; CPC; CPC; CPC</code> sequence, this produces a zero flag which is set only if the ''entire'' difference is zero.