Gate array: Difference between revisions

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{{Short description|Type of integrated circuit}}

[[File:ZX81 ULA.jpg|thumb|Sinclair ZX81 ULA]]

A '''gate array''' is an approach to the design and manufacture of [[application-specific integrated circuit]]s (ASICs) using a [[semiconductor device fabrication|prefabricated]] chip with components that are later interconnected into logic devices (e.g. [[NAND gate]]s, [[Flip-flop (electronics)|flip-flops]], etc.) according to custom order by adding metal interconnect layers in the factory. It was popular during the upheaval in the semiconductor industry in the 1980s, and its usage declined by the end of the 1990s.<ref>{{Cite book |last1=Pearson |first1=Ed |last2=Bethel |first2=Cindy L. |chapter=A design review: Concepts for mitigating SQL injection attacks |date=April 2016 |title=2016 4th International Symposium on Digital Forensic and Security (ISDFS) |chapter-url=https://doi.org/10.1109/isdfs.2016.7473537 |publisher=IEEE |pages=169 |doi=10.1109/isdfs.2016.7473537 |isbn=978-1-4673-9865-7 }}</ref>

Similar technologies have also been employed to design and manufacture analog, analog-digital, and structured arrays, but, in general, these are not called gate arrays.

Gate arrays have also been known as '''uncommitted logic arraysarray'''s (''ULAs''), which also offered linear circuit functions,<ref name="ferranti_ula2000">{{ cite book | url=https://archive.org/details/FerrantiULA2000SeriesDatasheet/mode/1up | title=The 224 Cell Uncommitted Array Family | publisher=Ferranti Electronic Components Division | date=March 1977 | access-date=23 February 2021 | pages=1 }}</ref> and ''semi-custom chips''.{{cn|date=June 2022}}

== History ==

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[[IBM]] developed proprietary bipolar master slices that it used in mainframe manufacturing in the late 1970s and early 1980s, but never commercialized them externally. [[Fairchild Semiconductor]] also flirted briefly in the late 1960s with bipolar arrays [[diode–transistor logic]] and transistor-transistor logic called Micromosaic and Polycell.<ref name=":0">{{Cite web|url=http://www.computerhistory.org/siliconengine/application-specific-integrated-circuits-employ-computer-aided-design/|title=1967: Application Specific Integrated Circuits employ Computer-Aided Design|work=The Silicon Engine|publisher=[[Computer History Museum]]|access-date=2018-01-28}}</ref>

[[CMOS]] (complementary [[metal–oxide–semiconductor]]) technology opened the door to the broad commercialization of gate arrays. The first CMOS gate arrays were developed by Robert Lipp<ref name=":1">{{Cite book|url=http://www.computerhistory.org/collections/catalog/102706880|title=Lipp, Bob oral history|publisher=[[Computer History Museum]]|date=14 February 2017 |access-date=2018-01-28}}</ref><ref>{{Cite web|url=http://www.computerhistory.org/siliconengine/people/|title=People|work=The Silicon Engine|publisher=Computer History Museum|access-date=2018-01-28}}</ref> in 1974 for International Microcircuits, Inc.<ref name=":0" /> (IMI) a Sunnyvale photo-mask shop started by Frank Deverse, Jim Tuttle and Charlie Allen, ex-IBM employees. This first product line employed [[10 µmμm process|7.5 micron]] single-level metal CMOS technology and ranged from 50 to 400 [[metal gate|gates]]. [[Computer-aided design]] (CAD) technology at the time was very rudimentary due to the low processing power available, so the design of these first products was only partially automated.

This product pioneered several features that went on to become standard in future designs. The most important were: the strict organization of [[NMOS logic|n-channel]] and [[PMOS logic|p-channel transistors]] in 2-3 row pairs across the chip; and running all interconnect on grids rather than minimum custom spacing, which had been the standard until then. This later innovation paved the way to full automation when coupled with the development of 2-layer CMOS arrays. Customizing these first parts was somewhat tedious and error-prone due to the lack of good software tools.<ref name=":0" /> IMI tapped into PC board development techniques to minimize manual customization effort. Chips at the time were designed by hand, drawing all components and interconnecting on precision gridded Mylar sheets, using colored pencils to delineate each processing layer. [[Rubylith]] sheets were then cut and peeled to create a (typically) 200x to 400x scale representation of the process layer. This was then photo-reduced to make a 1x mask. Digitization rather than rubylith cutting was just coming in as the latest technology, but initially, it only removed the rubylith stage; drawings were still manual and then "hand" digitized. PC boards, meanwhile, had moved from custom rubylith to PC tape for interconnects. IMI created to-scale photo enlargements of the base layers. Using decals of logic gate connections and PC tape to interconnect these gates, custom circuits could be quickly laid out by hand for these relatively small circuits, and photo-reduced using existing technologies.

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[[File:Timex Sinclair 1000 Motherboard BL (cropped Ferranti ULA).jpg|thumb|Ferranti {{abbr|ULA|Uncommitted Logic Array}} 2C210E on a [[Timex Sinclair 1000]] motherboard]]

Early gate arrays were low-performance and relatively large and expensive compared to state-of-the-art n-MOS technology then being used for custom chips. CMOS technology was being driven by very low-power applications such as watch chips and battery-operated portable instrumentation, not performance. They were also well under the performance of the existing dominant logic technology, [[transistor–transistor logic families]]. However, there were many niche applications where they were invaluable, particularly in low power, size reduction, portable and aerospace applications as well as time-to-market sensitive products. Even these small arrays could replace a board full of transistor–transistor logic gates if performance were not an issue. A common application was combining a number of smaller circuits that were supporting a larger LSI circuit on a board was affectionately known as "garbage collection". And the low cost of development and custom tooling made the technology available to the most modest budgets. Early gate arrays played a large part in the [[Citizens band radio#1970s popularity|CB craze in the 1970s]] as well as a vehicle for the introduction of other later mass-produced products such as modems and cell phones.

By the early 1980s, gate arrays were starting to move out of their niche applications to the general market. Several factors in technology and markets were converging. Size and performance were increasing; automation was maturing; the technology became "hot" when in 1981 IBM introduced its new flagship [[IBM 308X|3081]] mainframe with CPU comprising gate arrays,;. theyThey were used in a consumer product, the ZX81;, and new entrants to the market increased visibility and credibility.<ref>{{cite book |first=Chris |last=Smith |title=The ZX Spectrum ULA: How To Design A Microcomputer |publisher=ZX Design and Media |oclc=751703922 |date=2010 |isbn=9780956507105 |pages= |url=http://www.zxdesign.info/book/insideULA.shtml}}</ref><ref>{{cite web |title=Uncommitted IC logic |date=5 April 1980 |work=Design How-To |publisher=EDN |url=https://www.edn.com/uncommitted-ic-logic/}}</ref>

In 1981, [[Wilfred Corrigan]], Bill O'Meara, Rob Walker, and Mitchell "Mick" Bohn founded [[LSI Corporation|LSI Logic]].<ref>{{Cite book|url=http://www.computerhistory.org/collections/catalog/102746194|title=LSI Logic oral history panel |publisher=Computer History Museum|date=30 November 2011 |access-date=2018-01-28}}</ref> Their initial intention was to commercialize emitter coupled logic gate arrays, but discovered the market was quickly moving towards CMOS. Instead, they licensed CDI's silicon gate CMOS line as a second source. This product established them in the market while they developed their own proprietary 5-micron 2-layer metal line. This latter product line was the first commercial gate array product amenable to full automation. LSI developed a suite of proprietary development tools that allowed users to design their own chip from their own facility by remote login to LSI Logic's system.