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{{Short description|AMD hardware accelerator for encoding MP4 H.264 videos, built into AMD GPU's}}
'''Video Code Engine''' ('''VCE''', was earlier referred to as '''Video Coding Engine''',<ref name="amd-introducing"/> '''Video Compression Engine'''<ref>https://www.amd.com/en/media/43876/download</ref> or '''Video Codec Engine'''<ref>https://subscriptions.amd.com/newsletters/channelnews/pdf_guides/51884i_update_to_the_qrg_october2014.pdf</ref> in official AMD documentation) is [[Advanced Micro Devices|AMD's]] [[video encoding]] [[Application-specific integrated circuit|ASIC]] implementing the [[video codec]] [[H.264/MPEG-4 AVC]]. Since 2012 it is integrated into all of their [[List of AMD graphics processing units|GPUs]] and [[AMD Accelerated Processing Unit|APUs]] except Oland.▼
 
▲'''Video Code Engine''' ('''VCE''', was earlier referred to as '''Video Coding Engine''',<ref name="amd-introducing"/> '''Video Compression Engine'''<ref>{{cite web|url=https://www.amd.com/en/media/43876/download|title=Product brief|website=amd.com}}</ref> or '''Video Codec Engine'''<ref>{{cite web|url=https://subscriptions.amd.com/newsletters/channelnews/pdf_guides/51884i_update_to_the_qrg_october2014.pdf |title=Updates|website=amd.com}}</ref> in official AMD documentation) is [[Advanced Micro Devices|AMD's]] [[video encoding]] [[Applicationapplication-specific integrated circuit|ASIC]] implementing the [[video codec]] [[H.264/MPEG-4 AVC]]. Since 2012 it iswas integrated into all of their [[List of AMD graphics processing units|GPUs]] and [[List of AMD Acceleratedaccelerated Processingprocessing Unitunits|APUs]] except Oland.
Video Coding Engine was introduced with the [[Radeon HD 7000 Series|Radeon HD 7900]] on {{date|2011-12-22}}.<ref>{{cite web |url=https://www.amd.com/Documents/UVD3_whitepaper.pdf |title=White Paper AMD UnifiedVideoDecoder (UVD) |date=2012-06-15 |accessdate=2017-05-20}}</ref><ref>{{cite web |url=http://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9 |title=AnandTech Portal &#124; AMD Radeon HD 7970 Review: 28nm And Graphics Core Next, Together As One |publisher=Anandtech.com |accessdate=2014-03-27}}</ref><ref>{{cite web |url=http://techreport.com/review/22192/amd-radeon-hd-7970-graphics-processor/5 |title=AMD's Radeon HD 7970 graphics processor - The Tech Report - Page 5 |publisher=The Tech Report |accessdate=2014-03-27}}</ref> VCE occupies a considerable amount of the [[die (integrated circuit)|die]] surface and is not to be confused with AMD's [[Unified Video Decoder]] (UVD).▼
 
▲Video Coding EngineVCE was introduced with the [[Radeon HD 7000 Series|Radeon HD 7900series]] on {{date|22 December 2011-12-22}}.<ref>{{cite web |url=https://www.amd.com/Documents/UVD3_whitepaper.pdf |title=White Paper AMD UnifiedVideoDecoder (UVD) |date=2012-06-15 |accessdateaccess-date=2017-05-20}}</ref><ref>{{cite web |url=https://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9 |archive-url=https://web.archive.org/web/20120107150652/http://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9 |url-status=dead |archive-date=January 7, 2012 |title=AnandTech Portal &#124; AMD Radeon HD 7970 Review: 28nm And Graphics Core Next, Together As One |publisher=Anandtech.com |accessdateaccess-date=2014-03-27}}</ref><ref>{{cite web |url=httphttps://techreport.com/review/22192/amd-radeon-hd-7970-graphics-processor/5 |title=AMD's Radeon HD 7970 graphics processor - The Tech Report - Page 5 |date=3 January 2012 |publisher=The Tech Report |accessdateaccess-date=2014-03-27}}</ref> VCE occupies a considerable amount of the [[die (integrated circuit)|die]] surface at the time of its introduction<ref>{{cite web |url=http://www.abload.de/img/llano-blockdiagramm-95qhq1.jpg |title=AMD A-Series APU block diagram |date=2011-06-30 |access-date=2015-01-22 }}{{Dead link|date=August 2025 |bot=InternetArchiveBot |fix-attempted=yes }}</ref> and is not to be confused with AMD's [[Unified Video Decoder]] (UVD).
As of [[Ryzen#APUs: Raven Ridge|Raven Ridge]] VCE has been succeeded by [[Video Core Next|VCN]].▼
 
▲As of [[Ryzen#APUs:AMD Raven Ridge|Raven Ridge]] VCE(released hasJanuary been2018), UVD and VCE were succeeded by [[Video Core Next|VCN]] (VCN).
 
==Overview==
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[[File:AMD VCE hybrid mode.svg|thumb|The entropy encoding block of the VCE ASIC is also separately accessible, enabling ''"hybrid mode"''. In ''"hybrid mode"'' most of the computation is done by the 3D engine of the GPU. Using [[AMD APP SDK|AMD's Accelerated Parallel Programming SDK]] and [[OpenCL]] developers can create hybrid encoders that pair custom motion estimation, inverse discrete cosine transform and motion compensation with the hardware entropy encoding to achieve faster than real-time encoding.]]
 
The handling of video data involves computation of [[data compression]] algorithms and possibly of [[video processing]] algorithms. As the template [[Template:Compression methods|Compressioncompression methods]] shows, lossy video compression algorithms involve the steps: [[Motionmotion compensation|Motionmotion estimation]] (ME), [[Discretediscrete cosine transform]] (DCT), and [[entropy encoding]] (EC).
 
AMD Video Code Engine (VCE) is a full hardware implementation of the video codec H.264/MPEG-4 AVC. The ASICIt is capable of delivering 1080p at 60 frames/sec. Because its entropy encoding block is also a separately accessible Video Codec Engine, it can be operated in two modes: full-fixed mode and hybrid mode.<ref name="AnandTech">{{cite web |url=https://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9 |archive-url=https://web.archive.org/web/20120107150652/http://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9 |url-status=dead |archive-date=January 7, 2012 |title=Video & Movies: The Video Codec Engine, UVD3, & Steady Video 2.0 |publisher=[[AnandTech]] |date=December 22, 2011 |accessdateaccess-date=2017-05-20}}</ref><ref>{{cite web |url=https://www.amd.com/en-us/products/graphics/desktop/oem/8900 |title=Radeon HD 8900 Specs |publisher=AMD |accessdateaccess-date=2016-07-18}}</ref>
 
By employing [[AMD APP SDK]], available for Linux and Microsoft Windows, developers can create hybrid encoders that pair custom motion estimation, inverse discrete cosine transform and motion compensation with the hardware entropy encoding to achieve faster than real-time encoding. In hybrid mode, only the entropy encoding block of the VCE unit is used, while the remaining computation is offloaded to the 3D engine ([[Graphics Core Next|GCN]]) of the GPU, so the computing scales with the number of available compute units (CUs).
 
==={{Anchor|1.0|DEM}}VCE 1.0===
AsVCE<ref ofname="amd-introducing">{{cite Aprilweb |url=http://developer.amd.com/community/blog/2014,/02/19/introducing-video-coding-engine-vce/ there|title=Introducing arethe twoVideo versionsCoding ofEngine (VCE.<ref) name- AMD |website="developer.amd.com |access-introducing">date=15 January 2022 |archive-url=https://web.archive.org/web/20160604071338/http://developer.amd.com/community/blog/2014/02/19/introducing-video-coding-engine-vce/ |archive-date=4 June 2016 |url-status=dead}}</ref> Version 1.0 supports H.264 YUV420 (I & P frames), H.264 SVC Temporal Encode VCE, and ''Display Encode Mode'' (DEM).
 
It can be found on:
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** Mobile Radeon Rx M2xx Series (except R9 M280X with VCE 2.0 and R9 M295X with VCE 3.0)
** Mobile Radeon R5 M330 to R9 M390
** FirePro cards with 1st Generation GCN (GCN1) (Except W2100, which is Oland XT)
 
==={{Anchor|2.0}}VCE 2.0===
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** Mobile Radeon R9 M385, M385X
** Mobile Radeon R9 M470, M470X
** FirePro cardsW4300, withW5100, 2ndW8100, GenerationW9100, GCNS9100, (GCN2)S9150, S9170
** Mobile FirePro M6100, W6150M, W6170M
 
==={{Anchor|3.0}}VCE 3.0===
Video Code Engine 3.0 (VCE&nbsp;3.0) technology features a new high-quality video scaling and - since version 3.4 - [[High Efficiency Video Coding]] (HEVC/H.265).<ref>http{{cite web | title=Mailing Lists | website=lists.freedesktop.org | date=4 June 2015 | url=https://lists.freedesktop.org/archives/dri-devel/2015-June/084083.html [pull]| amdgpu drmaccess-next-4date=25 September 2023}}</ref><ref>{{Cite web|url=https://github.2com/rigaya/VCEEnc|title=VCEEnc|date=June 10, 2023|via=GitHub}}</ref>
 
It, together with [[Unified Video Decoder|UVD]] 6.0, can be found on 3rd generation of Graphics Core Next (GCN3) with "Tonga", "Fiji", "Iceland", and "CarrizoFiji" (VCE 3.10) based graphics controller hardware, which is now used [[AMD Radeon Rx 300 Seriesseries]] (Pirate Islands GPU family) and VCE 3.4 by actual [[AMD Radeon Rx 400 Seriesseries]] and [[AMD Radeon 500 Seriesseries]] (both Polaris GPU family).
 
* Tonga: Radeon R9 285, 380, 380X; Mobile Radeon R9 M390X, M395, M395X, M485X
* Tonga XT: FirePro W7100, S7100X, S7150, S7150 X2
* Fiji: Radeon R9 Fury, Fury X, Nano; Radeon Pro Duo (2016); FirePro S9300, W7170M; Instinct MI8
* Polaris: RX 460, 470, 480; RX 550, 560, 570, 580; Radeon Pro Duo (2017)
 
AMD's [[List_of_AMD_accelerated_processing_units#"Carrizo"_(2016)|Carrizo]] platform features VCE 3.1, retaining the same capabilities as the VCE found in "Fiji" and "Tonga".<ref>{{cite web | title=AMDGPU (vi.c) | url=https://github.com/ROCm/ROCK-Kernel-Driver/blob/master/drivers/gpu/drm/amd/amdgpu/vi.c#L282-L289|website=GitHub}}</ref>
 
[[List_of_AMD_accelerated_processing_unit_microprocessors#"Stoney_Ridge"_(2016)|Stoney Ridge]] features a cut down version of VCE 3.4 without HEVC/H.265 encoding and is accompanied by a UVD 6.2 engine.<ref>{{cite web | title=AMDGPU (vi.c) | url=https://github.com/ROCm/ROCK-Kernel-Driver/blob/55cf32d54948f98f1cc6d6b3fdc05b32fab9b3f0/drivers/gpu/drm/amd/amdgpu/vi.c#L2153-L2169|website=GitHub}}</ref>
 
VCE 3.0 removes support for H.264 B-frames.<ref>{{cite web |title=Video Encode API: BFrames not supported on RX 4xx? · Issue #8 · GPUOpen-LibrariesAndSDKs/AMF |url=https://github.com/GPUOpen-LibrariesAndSDKs/AMF/issues/8 |website=GitHub |language=en}}</ref>
 
==={{Anchor|4.0}}VCE 4.0===
The Video Code Engine&nbsp;4.0 encoder and UVD&nbsp;7.0 decoder are included in the Vega-based GPUs.<ref name='TR_vega'"TR_vega_patch" /><ref>{{cite news |last1=Larabel |first1=Michael |title=AMD Sends Out 100 Patches, Enabling Vega Support In AMDGPU DRM |url=https://www.phoronix.com/scan.php?page=news_item&px=AMDGPU-Vega-10-Support |accessdateaccess-date=25 August 2017 |publisher=Phoronix |date=20 March 2017}}</ref>
 
====VCE 4.1====
AMD's Vega20 GPU, present in the Instinct Mi50, Instinct Mi60 and Radeon VII cards, include VCE 4.1 and two UVD 7.2 instances.<ref>{{Citecite web|url=https://lists.freedesktop.org/archives/amd-gfx/2018-May/022291.html|title=[PATCH 50/57] drm/amdgpu/vg20:Enable the 2nd instance IRQ for uvd 7.2|last=Deucher|first=Alex|date=15 May 2018|accessdateaccess-date=2019-01-13}}</ref><ref>{{Citecite web|url=https://lists.freedesktop.org/archives/amd-gfx/2018-May/022282.html|title=[PATCH 42/57] drm/amd/include/vg20: adjust VCE_BASE to reuse vce 4.0 header files|last=Deucher|first=Alex|date=15 May 2018|accessdateaccess-date=2019-01-13}}</ref>
 
===Feature overview===
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==Operating system support==
The VCE SIP core needs to be supported by the [[device driver]]. The device driver provides one or multiple [[Application programming interface|interfaces]], e. g. [[OpenMAX IL]]. One of these interfaces is then used by end-user software, like [[GStreamer]] or [[HandBrake]] (HandBrake rejected VCE support in December 2016,<ref>{{cite web |url=https://github.com/HandBrake/HandBrake/pull/88 |title=HandBrake rejected VCE pull request |website=[[GitHub]] |date=2016-12-08 |accessdateaccess-date=2017-08-15}}</ref> but added it in December 2018 <ref name="Handbrake">{{cite web |url=https://forum.handbrake.fr/viewtopic.php?f=33&t=38539#p181659 |title=HandBrake added VCE support in v1.2.0 |date=2018-12-22 |accessdateaccess-date=2018-12-31 |archive-date=2022-03-04 |archive-url=https://web.archive.org/web/20220304141623/https://forum.handbrake.fr/viewtopic.php?f=33&t=38539#p181659 |url-status=dead }}</ref>), to access the VCE hardware and make use of it.
 
AMD's [[proprietary software|proprietary]] device driver [[AMD Catalyst]] is available for multiple operating systems and support for VCE has beenwas added to it{{citation needed|date=June 2014}}. Additionally, a [[free and open-source graphics device driver#ATI/AMD|free device driver]] is available. This driver also supports the VCE hardware.
 
===Linux===
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{{Main|AMD Catalyst|Free and open-source graphics device driver#ATI/AMD|l1=AMD Catalyst for Linux|l2=Free Radeon driver}}
 
* Initial VCE support has beenwas added on {{date|4 February 2014-02-04}} by Christian König of AMD to the free radeon driver.<ref>{{cite mailing list |url=httphttps://lists.freedesktop.org/archives/mesa-dev/2014-February/053203.html |title=initial VCE support |date=4 February 2014 |accessdateaccess-date=28 November 2015 |mailing-list=mesa-dev |last=König |first=Christian}}</ref>
* [[Gallium3D|Gallium3D state tracker]] for [[OpenMAX]] was added {{date|24 October 2013-10-24}} to [[Mesa 3D]].<ref>{{cite mailing list |url=httphttps://lists.freedesktop.org/archives/mesa-dev/2013-October/046943.html |title=OpenMAX state tracker |date=24 October 2013 |accessdateaccess-date=28 November 2015 |mailing-list=mesa-dev |last=König |first=Christian}}</ref>
* The [[free and open-source graphics device driver#ATI/AMD|free and open-source Radeon driver]] has beenwas adapted to usinguse OpenMAX with the [[GStreamer]] OpenMAX (gst-omx) support for exposing the VCE video encode engine.<ref>{{cite web |url=https://www.phoronix.com/scan.php?page=news_item&px=MTU5MTc |title=AMD Open-Sources VCE Video Encode Engine Code |date=2014-02-04 |work=[[Phoronix]] |accessdateaccess-date=2017-05-20}}</ref>
* AMD employee Leo Liu implemented [[H.264/MPEG-4 AVC#Levels|h264 level support]] into the Mesa 3D state tracker.<ref>{{cite web |url=httphttps://cgit.freedesktop.org/mesa/mesa/commit/?id=e2db7c10d63399b6a34ba5fa56ce9e1eac402416 |title=st/omx/enc: implement h264 level support |date=2014-06-12 |accessdateaccess-date=2017-05-20}}</ref>
 
===Windows===
The software "MediaShow Espresso Video Transcoding" seems to utilize VCE and UVD to the fullest extent possible.<ref>{{cite web |url=httphttps://www.guru3d.com/articles_pages/amd_a8_7600_apu_review,13.html |title=MediaShow Espresso Video Transcoding Benchmark |date=2014-01-14 |accessdateaccess-date=2017-05-20 |archive-date=2022-03-04 |archive-url=https://web.archive.org/web/20220304141613/https://www.guru3d.com/articles_pages/amd_a8_7600_apu_review,13.html |url-status=dead }}</ref>
 
[[XSplit Broadcaster]] supports VCE from version 1.3.<ref>{{cite web |url=http://www.splitmedialabs.com/news/109-splitmedialabs-releases-xsplit-gamecaster-and-updates-xsplit-broadcaster-13 |archive-url=https://archive.istoday/20140722041719/http://www.splitmedialabs.com/news/109-splitmedialabs-releases-xsplit-gamecaster-and-updates-xsplit-broadcaster-13 |url-status=dead |archive-date=2014-07-22 |title=XSplit Broadcaster 1.3 maintenance update includes mainly performance enhancements and maintenance fixes including such noteworthy features such as support for AMD's VCE H.264 hardware encoder}}</ref>
 
[[Open Broadcaster Software]] (OBS Studio) supports VCE for recording and streaming. The original Open Broadcaster Software (OBS) requires a fork build in order to enable VCE.<ref>{{cite web |url=https://obsproject.com/forum/threads/obs-branch-with-amd-vce-support.13996/ |title=OBS branch with AMD VCE support |date=May 2, 2014 |accessdateaccess-date=2017-05-20}}</ref>
 
[[AMD Radeon Software Crimson|AMD Radeon Software]] supports VCE with built in game capture ("Radeon ReLive") and use AMD AMF/VCE on APU or Radeon Graphics card to reduce FPS drop when capturing game or video content.<ref>{{cite web |url=http://support.amd.com/en-us/kb-articles/Pages/Radeon-Software-Crimson-ReLive-Edition-16.12.1-Release-Notes.aspx |title=Radeon Software Crimson ReLive Edition 16.12.1 Release Notes |accessdateaccess-date=2017-05-20}}</ref>
 
[[HandBrake]] added Video Coding Engine support in version 1.2.0 in December 2018.<ref name="Handbrake"/>
 
==Successor==
{{Main|Video Core Next}}
 
The VCE was succeeded by AMD Video Core Next in the Raven Ridge series of APUs released in October 2017. The VCN combines both encode (VCE) and decode (UVD).<ref>{{cite news|last1=Larabel|first1=Michael|title=Radeon VCN Encode Support Lands In Mesa 17.4 Git|url=https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands|accessdateaccess-date=20 November 2017|publisher=Phoronix|date=17 November 2017}}</ref>
 
==See also==
 
=== Video hardware technologies ===
 
==== AMD ====
 
* [[Video Core Next]] - [[Advanced Micro Devices|AMD]]
* Video Coding Engine - [[Advanced Micro Devices|AMD]]
* [[Unified Video Decoder]] - [[Advanced Micro Devices|AMD]]
* [[Video Shader]] - [[ATI Technologies|ATI]]
 
==== Others ====
 
* [[Intel Quick Sync Video]] – Intel's equivalent SIP core
* [[Nvidia NVENC]] – Nvidia's equivalent SIP core
*[[Qualcomm Hexagon]] - Qualcomm's equivalent SIP core
 
==References==
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[[Category:Video acceleration]]
[[Category:Advanced Micro DevicesAMD IP cores]]
[[Category:Video compression and decompression ASIC]]
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