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{{Short description|Family of microcontrollers}}
{{About|the series of AVR microcontrollers|the AVR instruction set|Atmel AVR instruction set}}
{{Confuse|automatic voltage regulator}}
[[File:Avr_logo.svg|right|thumb|AVR logo]]
[[File:AVR_group.jpg|right|thumb|Various older AVR microcontrollers: ATmega8 in 28-pin narrow dual in-line package ([[Dual in-line package|DIP]]-28N), ATxmega128A1 in 100-pin thin quad flat pack ([[TQFP]]-100) package, ATtiny45 in 8-pin small outline ([[Small Outline Integrated Circuit|SO]]-8) package
[[File:ATMEGA328P-PU.jpg|right|thumb|[[ATmega328]]P in 28-pin narrow dual in-line package ([[Dual in-line package|DIP]]-28N). It is commonly found on [[Arduino]] boards.]]
'''AVR''' is a family of [[microcontrollers]] developed since 1996 by [[Atmel]], acquired by [[Microchip Technology]] in 2016.
AVR microcontrollers
The AVR 8-bit microcontroller architecture was introduced in 1997. By 2003, Atmel had shipped 500 million AVR flash microcontrollers.<ref>Atmel press release. [http://www.prnewswire.com/news-releases/atmels-avr-microcontroller-ships-500-million-units-72278687.html "Atmel's AVR Microcontroller Ships 500 Million Units"].</ref>
== History ==
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Atmel says that the name AVR is not an acronym and does not stand for anything in particular. The creators of the AVR give no definitive answer as to what the term "AVR" stands for.<ref name="storyofavr" /> However, it is commonly accepted that AVR stands for '''A'''lf and '''V'''egard's '''R'''ISC processor.<ref>{{cite web|title=UNSW School of Computer Science and Engineering - General AVR Info|url=http://www.cse.unsw.edu.au/~pcb/avr/avr.html|url-status=dead|archive-url=https://web.archive.org/web/20120623131604/http://www.cse.unsw.edu.au/~pcb/avr/avr.html|archive-date=2012-06-23|access-date=2012-09-19|publisher=Cse.unsw.edu.au}}</ref> Note that the use of "AVR" in this article generally refers to the 8-bit RISC line of Atmel AVR microcontrollers.
The original AVR MCU was developed at a local [[Application-specific integrated circuit|ASIC]]
Among the first of the AVR line was the AT90S8515, which in a 40-pin DIP package has the same pinout as an [[Intel 8051|8051]] microcontroller, including the external multiplexed address and data bus. The polarity of the <span style="text-decoration: overline">RESET</span> line was opposite (8051's having an active-high RESET, while the AVR has an active-low <span style="text-decoration: overline">RESET</span>), but other than that the pinout was identical.
== Device overview ==
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* Peripherals equal to or exceed megaAVR 0-series
* Event System
* Improved AVRxt instruction set (improved timing of calls), hardware multiply
'''megaAVR''' – the ATmega series
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* Event system
* New peripherals with enhanced functionality
* Improved AVRxt instruction set (improved timing of calls)
'''AVR Dx''' – The AVR Dx family
{| class="wikitable"
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* 12-bit ADC
* 10-bit DAC
* '''AVR DA-series''' (early 2020) – The high memory density makes these MCUs well suited for both wired and wireless communication-stack-intensive functions.
** integrated sensors for capacitative touch measurement ([[Human–computer interaction|HCI]])
**
** no external high frequency crystal
* '''AVR DB-series''' (mid-late 2020) – inherits many features from the DA-family, while adding its own:
** 2 or 3 on-chip opamps
** MultiVoltage IO (MVIO) on PORTC
** Supports external HF crystal
* '''AVR DD-series'''
** 16–64 KiB Flash
** 2–8 KiB SRAM
** MVIO support on 3 or 4 pins▼
** 14–32-pin package
** internal 24 MHz oscillator
** 7–23-channel 130 kS/s 12-bit differential Analog-to-Digital Converter (ADC)
** no amplifiers
** 1 analog comparator
** Two USARTs, one SPI, one dual-mode TWI
▲** Multi-Voltage Input/Output (MVIO) support on 3 or 4 pins on Port C
** 4 Configurable Custom Logic (CCL) cells, 6 Event System channels
* '''AVR EA-series'''
** 8–64 KiB Flash
** 28–48-pin package
** internal 20 MHz oscillator
** 24–32-channel 130 kS/s 12-bit differential Analog-to-Digital Converter (ADC)
** Programmable Gain Amplifier (PGA) with up to 16x gain
** 2 analog comparators
** Three USARTs, one SPI, one dual-mode TWI
** no Multi-Voltage Input/Output (MVIO)
** 4 Configurable Custom Logic (CCL) cells, 6 Event System channels
'''XMEGA'''
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==== Internal registers ====
In the tinyAVR and megaAVR variants of the [[Atmel AVR instruction set|AVR architecture]], the working registers are mapped in as the first 32 data memory addresses (0000<sub>16</sub>–001F<sub>16</sub>), followed by 64 I/O registers (0020<sub>16</sub>–005F<sub>16</sub>). In devices with many peripherals, these registers are followed by 160 “extended I/O” registers, only accessible as [[memory-mapped I/O]] (0060<sub>16</sub>–00FF<sub>16</sub>).
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In the XMEGA variant, the working register file is not mapped into the data address space; as such, it is not possible to treat any of the XMEGA's working registers as though they were SRAM. Instead, the I/O registers are mapped into the data address space starting at the very beginning of the address space. Additionally, the amount of data address space dedicated to I/O registers has grown substantially to 4096 bytes (0000<sub>16</sub>–0FFF<sub>16</sub>). As with previous generations, however, the fast I/O manipulation instructions can only reach the first 64 I/O register locations (the first 32 locations for bitwise instructions). Following the I/O registers, the XMEGA series sets aside a 4096 byte range of the data address space, which can be used optionally for mapping the internal EEPROM to the data address space (1000<sub>16</sub>–1FFF<sub>16</sub>). The actual SRAM is located after these ranges, starting at 2000<sub>16</sub>.
==== General-purpose input/output (GPIO) ports ====
Each [[GPIO]] port on a tiny or mega AVR drives up to eight pins and is controlled by three 8-bit registers: DDR''x'', PORT''x'' and PIN''x'', where ''x'' is the port identifier.
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* PIN''x'': Input register, used to read an input signal. On some devices, this register can be used for pin toggling: writing a logic one to a PIN''x'' bit toggles the corresponding bit in PORT''x'', irrespective of the setting of the DDR''x'' bit.<ref>[http://www.atmel.com/Images/Atmel-2586-AVR-8-bit-Microcontroller-ATtiny25-ATtiny45-ATtiny85_Datasheet.pdf atmel.com]</ref>
Newer ATtiny
xmegaAVR have additional registers for push/pull, totem-pole and pullup configurations.
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=== Program execution ===
Atmel's AVRs have a two-stage, single-level [[Pipeline (computing)|pipeline]] design
The AVR processors were designed with the efficient execution of [[Compiler|compiled]] [[C (programming language)|C]] code in mind and have several built-in pointers for the task.
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=== Instruction set ===
{{Main|Atmel AVR instruction set}}
The [[Atmel AVR instruction set|AVR instruction set]] is more [[Orthogonal instruction set|orthogonal]] than those of most eight-bit microcontrollers, in particular the [[Intel 8051|8051 clones]] and [[PIC microcontroller]]s with which AVR
* [[Pointer register]]s X, Y, and Z have addressing capabilities that are different from each other.
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* Accessing read-only data stored in the program memory (flash) requires special LPM instructions; the flash bus is otherwise reserved for instruction memory.
The mostly regular instruction set makes C (and even Ada) compilers fairly straightforward and efficient. [[GNU Compiler Collection|GCC]] has included AVR support for quite some time, and that support is widely used. [[LLVM]] also has rudimentary AVR support. In fact, Atmel solicited input from major developers of compilers for small microcontrollers, to determine the instruction set features that were most useful in a compiler for high-level languages.<ref name="codesign" />
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=== Development ===
AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are sold under various names that share the same basic core, but with different peripheral and memory combinations. Compatibility between chips in each family is fairly good, although I/O controller features may vary.
The Atmel AVR GNU C/C++ [[cross compiler]], "avr-gcc" and "avr-g++", is used in both WinAVR and Atmel Studio.<ref>
Microchip.
[https://www.microchip.com/en-us/tools-resources/develop/microchip-studio/gcc-compilers "Toolchains for AVR Microcontrollers (MCUs)"].
</ref><ref>
Timothy S Margush.
"Some Assembly Required: Assembly Language Programming with the AVR Microcontroller".
2016.
[https://www.google.com/books/edition/Some_Assembly_Required/n5E3EQAAQBAJ?gbpv=1&pg=PA539 "Chapter 14: Programming the AVR in C"].
p. 539
</ref><ref>
J. M. Hughes.
[https://www.google.com/books/edition/Arduino_A_Technical_Reference/7oMpDAAAQBAJ "Arduino: A Technical Reference"].
2016.
p. 127-131.
</ref><ref>
Joe Pardue.
[https://www.google.com/books/edition/C_Programming_for_Microcontrollers/jAzuNAAACAAJ "C Programming for Microcontrollers: Featuring ATMEL's AVR Butterfly and the Free WinAVR Compiler"].
2005.
</ref><ref>
Elliot Williams.
[https://www.google.com/books/edition/AVR_Programming/y7C2AgAAQBAJ "AVR Programming"].
2014.
</ref>
The Arduino team borrowed from WinAVR for the Windows version of the [[Arduino Software|Arduino software]].<ref>
Dale Wheat.
[https://www.google.com/books/edition/Arduino_Internals/U6EtJwBzY1oC "Arduino Internals"].
2011.
p. 227.
</ref>
See [[#External links|external links]] for sites relating to AVR development.
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** Optional boot code section with independent lock bits for protection
* On-chip debugging (OCD) support through JTAG or [[debugWIRE]] on most devices
** The JTAG signals (TMS, TDI, TDO, and TCK) are multiplexed on [[General Purpose Input/Output|GPIOs]]. These pins can be configured to function as JTAG or GPIO depending on the setting of a [[fuse bit]], which can be programmed via [[in-system programming]] (ISP) or HVSP. By default, AVRs with JTAG come with the JTAG interface enabled.
** [[debugWIRE]] uses the /RESET pin as a bi-directional communication channel to access on-chip debug circuitry. It is present on devices with lower pin counts, as it only requires one pin.
* Internal data [[EEPROM]] up to 4 KB
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** [[Pulse-width modulation|PWM]] output (some devices have an enhanced PWM peripheral which includes a dead-time generator)
** Input capture that record a time stamp triggered by a signal edge
*
* 10 or 12-bit [[Analog-to-digital converter|A/D converters]], with multiplex of up to 16 channels
* 12-bit [[Digital-to-analog converter|D/A converters]]
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=== UPDI ===
The Unified Program and Debug Interface (UPDI) is a one-wire interface for external programming and on-chip debugging of newer ATtiny and ATmega devices.
=== High-voltage serial ===
High-voltage serial programming (HVSP)<ref>{{cite web|url=http://support.atmel.no/knowledgebase/avrstudiohelp/mergedProjects/AVRDragon/AVRDragon_HVSP_Description.htm|title=HVSP_Description|publisher=Support.atmel.no|url-status=dead|archive-url=https://web.archive.org/web/20091012094540/http://support.atmel.no/knowledgebase/avrstudiohelp/mergedProjects/AVRDragon/AVRDragon_HVSP_Description.htm|archive-date=2009-10-12|access-date=2012-09-19}}</ref> is mostly the backup mode on smaller AVRs. An 8-pin AVR package does not leave many unique signal combinations to place the AVR into a programming mode. A 12-volt signal, however, is something the AVR should only see during programming and never during normal operation. The high voltage mode can also be used in some devices where the reset pin
=== High-voltage parallel ===
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=== ROM ===
The AT90SC series of AVRs are available with a factory mask-ROM
=== aWire ===
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=== debugWIRE ===
{{Main|debugWIRE}}
[[debugWIRE]] is Atmel's solution for providing on-chip debug capabilities via a single microcontroller pin. It is
=== JTAG ===
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# The JTAGICE 3<ref>{{cite web|url=http://www.atmel.com/dyn/products/tools_card.asp?tool_id=17213&category_id=163&family_id=607&subfamily_id=2138|title=JTAGICE 3- Atmel Corporation|publisher=Atmel.com|access-date=2012-09-19}}</ref> is a midrange debugger in the JTAGICE family (JTAGICE mkIII). It supports JTAG, aWire, SPI, and PDI interfaces.
# The JTAGICE mkII<ref>{{cite web|url=http://qaswww.atmel.com/tools/avrjtagicemkii.aspx|title=AVR JTAGICE mkII|work=Atmel|url-status=dead|archive-url=https://archive.today/20130215133712/http://qaswww.atmel.com/tools/avrjtagicemkii.aspx|archive-date=15 February 2013|access-date=13 January 2013}}</ref> replaces the JTAGICE and is similarly priced. The JTAGICE mkII interfaces to the PC via USB, and supports both JTAG and the newer debugWIRE interface. Numerous third-party clones of the Atmel JTAGICE mkII device started shipping after Atmel released the communication protocol.<ref>{{cite web|url=http://www.atmel.com/dyn/resources/prod_documents/doc2587.pdf |archive-url=https://web.archive.org/web/20050516182708/http://www.atmel.com/dyn/resources/prod_documents/doc2587.pdf |archive-date=2005-05-16 |url-status=live|title=JTAGICE mkII Communication Protocol|access-date=2012-09-19}}</ref>
# The AVR Dragon<ref>{{cite web|url=http://www.atmel.com/tools/avrdragon.aspx|title=AVR Dragon|work=Atmel|access-date=13 January 2013}}</ref> is a low-cost (approximately $50) substitute for the JTAGICE mkII for certain target parts. The AVR Dragon provides in-system serial programming, high-voltage serial programming and parallel programming, as well as JTAG or debugWIRE emulation for parts with 32 KB of program memory or less. ATMEL changed the debugging feature of AVR Dragon with the latest firmware of AVR Studio 4
# The JTAGICE adapter interfaces to the PC via a standard serial port.<ref>{{Cite web|url=http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42710-AVR-JTAGICE-mkII_UserGuide.pdf |archive-url=https://web.archive.org/web/20170702215107/http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42710-AVR-JTAGICE-mkII_UserGuide.pdf |archive-date=2017-07-02 |url-status=live|title=AVR JTAGICE mkII User's Guide|website=microchip.com|access-date=25 March 2020}}</ref> Although the JTAGICE adapter has been declared "[[End-of-life (product)|end-of-life]]" by Atmel, it is still supported in AVR Studio and other tools.
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=== JTAGICE ===
The [[JTAG]] In Circuit Emulator (JTAGICE) debugging tool supports on-chip debugging (OCD) of AVRs with a JTAG interface. The original JTAGICE (sometimes retroactively referred to as JTAGICE mkI) uses an RS-232 interface to a PC and can only program
=== JTAGICE mkII ===
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The RAVEN kit supports wireless development using Atmel's [[IEEE 802.15.4]] chipsets, for [[Zigbee]] and other wireless stacks. It resembles a pair of wireless more-powerful Butterfly cards, plus a wireless USBKey; and costing about that much (under $US100). All these boards support JTAG-based development.
The kit includes two AVR Raven boards, each with a 2.4 GHz transceiver supporting IEEE 802.15.4 (and a freely licensed Zigbee stack). The radios are driven with ATmega1284p processors, which are supported by a custom [[segmented LCD
The USB stick uses an AT90USB1287 for connections to a USB host and to the 2.4 GHz wireless links. These are intended to monitor and control the remote nodes, relying on host power rather than local batteries.
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USB-based AVRs have been used in the Microsoft Xbox hand controllers. The link between the controllers and Xbox is USB.
Numerous companies produce AVR-based microcontroller boards intended for use by hobbyists, robot builders, experimenters and small system developers including: Cubloc,<ref>{{cite web|url=http://www.cubloc.com/|title=Comfile Technology|publisher=Comfile Technology, Inc.|access-date=13 January 2013|archive-date=17 January 2013|archive-url=https://web.archive.org/web/20130117112843/http://www.cubloc.com/|url-status=dead}}</ref> gnusb,<ref>{{cite web|url=
[[Schneider Electric]] used to produce the M3000 Motor and Motion Control Chip, incorporating an Atmel AVR Core and an advanced motion controller for use in a variety of motion applications but this has been discontinued.<ref>{{cite web|url=http://www.imshome.com/products/m3000.html|title=M3000 Motion controller on a chip|work=imshome.com|publisher=Schneider Electric Motion USA|url-status=dead|archive-url=https://web.archive.org/web/20091202120117/http://www.imshome.com/products/m3000.html|archive-date=2009-12-02|access-date=2011-08-02}}</ref>
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* avr_core,<ref>{{cite web|url=http://opencores.org/project,avr_core|title=AVR Core :: Overview|publisher=OpenCores|access-date=2012-09-19}}</ref> written in [[VHDL]], is a clone aimed at being as close as possible to the ATmega103.
* Navré,<ref>{{cite web|url=http://opencores.org/project,navre|title=Navré AVR clone (8-bit RISC) Overview|publisher=OpenCores|access-date=2012-09-19}}</ref> written in [[Verilog]], implements all [[Atmel AVR instruction set|Classic Core]] instructions and is aimed at high performance and low resource usage. It does not support [[interrupt]]s.
* softavrcore,<ref>{{cite web|url=https://opencores.org/projects/softavrcore|title=Soft AVR Core + Interfaces Overview|publisher=OpenCores|access-date=2020-06-16}}</ref> written in [[Verilog]], implements the [[AVR instruction set]] up to AVR5, supports interrupts along with optional automatic interrupt acknowledgement, power saving via [[Idle (CPU)|sleep mode]] plus some peripheral interfaces and [[
* The opencores project CPU lecture<ref>{{cite web|url=http://opencores.org/project,cpu_lecture|title=CPU lecture|publisher=OpenCores|access-date=2015-02-16}}</ref> written in [[VHDL]] by Dr. Jürgen Sauermann explains in detail how to design a complete AVR-based [[system on a chip]] (SoC).
== Other vendors ==
In addition to the chips manufactured by Atmel, clones are available from LogicGreen Technologies.<ref>{{cite web|url=http://www.lgt-semi.com/?page_id=5267&lang=en|title=LGT8F88A FLASH Microcontroller|publisher=LogicGreen Technologies|url-status=dead|archive-url=https://web.archive.org/web/20170829052145/http://www.lgt-semi.com/?page_id=5267&lang=en|archive-date=2017-08-29|access-date=2019-01-18|postscript=,}} a clone of the ATmega88.</ref> These parts are not exact clones
Microcontrollers using the ATmega architecture are being manufactured by NIIET in [[Voronesh|Voronezh]], Russia, as part of the 1887 series of integrated circuits. This includes an [[ATmega128]] under the [[Soviet integrated circuit designation|designation]] 1887VE7T ({{
== References ==
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== External links ==
{{Commons category
{{Wikibooks|Embedded Systems|Atmel AVR}}
{{Portal|Electronics}}
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