Content deleted Content added
No edit summary Tags: Mobile edit Mobile web edit |
m →External links: HTTP to HTTPS for Blogspot |
||
(41 intermediate revisions by 25 users not shown) | |||
Line 1:
{{short description|Algorithm that multiplies two signed binary numbers in two's complement notation}}
{{Use dmy dates|date=April 2022}}
==The algorithm==
Booth's algorithm examines adjacent pairs of [[bit]]s of the ''N''-bit multiplier ''Y'' in signed [[two's complement]] representation, including an implicit bit below the [[least significant bit]], ''y''<sub>−1</sub> = 0. For each bit ''y''<sub>''i''</sub>, for ''i'' running from 0 to ''N'' − 1, the bits ''y''<sub>''i''</sub> and ''y''<sub>''i''−1</sub> are considered. Where these two bits are equal, the product accumulator ''P'' is left unchanged. Where ''y''<sub>''i''</sub> = 0 and ''y''<sub>''i''−1</sub> = 1, the multiplicand times 2<sup>''i''</sup> is added to ''P''; and where ''y''<sub>i</sub> = 1 and ''y''<sub>i−1</sub> = 0, the multiplicand times 2<sup>''i''</sup> is subtracted from ''P''. The final value of ''P''<nowiki> is the signed product.</nowiki>{{Citation needed|reason=No source for the algorithm|date=April 2025}}
The representations of the multiplicand and product are not specified; typically, these are both also in two's complement representation, like the multiplier, but any number system that supports addition and subtraction will work as well. As stated here, the order of the steps is not determined. Typically, it proceeds from [[Least significant bit|LSB]] to [[Most significant bit|MSB]], starting at ''i'' = 0; the multiplication by 2<sup>''i''</sup> is then typically replaced by incremental shifting of the ''P'' accumulator to the right between steps; low bits can be shifted out, and subsequent additions and subtractions can then be done just on the highest ''N'' bits of ''P''.<ref name="Chen_1992"/> There are many variations and optimizations on these details
The algorithm is often described as converting strings of 1s in the multiplier to a high-order +1 and a low-order −1 at the ends of the string. When a string runs through the MSB, there is no high-order +1, and the net effect is interpretation as a negative of the appropriate value.
Line 24 ⟶ 25:
# [[arithmetic shift|Arithmetically shift]] the value obtained in the 2nd step by a single place to the right. Let ''P'' now equal this new value.
# Repeat steps 2 and 3 until they have been done ''y'' times.
# Drop the least significant (rightmost) bit from ''P''. This is the product of '''m''' and '''r'''<nowiki>.</nowiki>{{Citation needed|reason=No source for the Implementation|date=April 2025}}
==Example==
Line 45 ⟶ 46:
* The product is 1111 0100, which is −12.
The above-mentioned technique is inadequate when the multiplicand is the [[two's complement#
* A = 1 1000 0000 0
* S = 0 1000 0000 0
Line 64 ⟶ 65:
==How it works==
Consider a positive multiplier consisting of a block of 1s surrounded by 0s. For example, 00111110. The product is given by:
where M is the multiplicand. The number of operations can be reduced to two by rewriting the same as
In fact, it can be shown that any sequence of 1s in a binary number can be broken into the difference of two binary numbers:
Hence, the multiplication can actually be replaced by the string of ones in the original number by simpler operations, adding the multiplier, shifting the partial product thus formed by appropriate places, and then finally subtracting the multiplier. It is making use of the fact that it is not necessary to do anything but shift while
This scheme can be extended to any number of blocks of 1s in a multiplier (including the case of a single 1 in a block). Thus,
Booth's algorithm follows this old scheme by performing an addition when it encounters the first digit of a block of ones (0 1) and
== Pentium multiplier implementation ==
Intel's [[Pentium]] microprocessor uses a radix-8 variant of Booth's algorithm in its 64-bit hardware multiplier. Because of the way it implements the radix-8 multiplication, it needs a complex auxiliary circuit to perform the special case of multiplication by 3 in a way that minimizes latency, combining the use of [[Carry-lookahead adder|carry-lookahead]], [[carry-select addition|carry-select]], and [[Kogge–Stone addition]].<ref>{{Cite web |first=Ken|last=Shirriff|title=The Pentium contains a complicated circuit to multiply by three |url=https://www.righto.com/2025/03/pentium-multiplier-adder-reverse-engineered.html |access-date=2025-03-03|website=righto.com}}</ref>
== See also ==
Line 86 ⟶ 90:
* [[Redundant binary representation]]
* [[Wallace tree]]
* [[Dadda multiplier]]
==References==
{{reflist|refs=
<ref name="Booth_1951">{{cite journal |title=A Signed Binary Multiplication Technique |author-first=Andrew Donald |author-last=Booth |author-link=Andrew Donald Booth |journal=The Quarterly Journal of Mechanics and Applied Mathematics<!-- Q.J. Mech. Appl. Math. --> |volume=IV |issue=2 |date=1951 |orig-year=1950-08-01 |pages=
<ref name="Chen_1992">{{cite book |title=Signal processing handbook |author-first=Chi-hau |author-last=Chen |publisher=[[CRC Press]] |date=1992 |isbn=978-0-8247-7956-6 |page=234 |url=https://books.google.com/books?id=10Pi0MRbaOYC&pg=PA234}}</ref>
}}
Line 95 ⟶ 100:
==Further reading==
* {{cite journal |author-last=Collin |author-first=Andrew |title=Andrew Booth's Computers at Birkbeck College |journal=Resurrection |issue=5 |date=Spring 1993 |___location=London |publisher=[[Computer Conservation Society]] |url=http://www.cs.man.ac.uk./CCS/res/res05.htm#e}}
* {{cite book |author-last1=Patterson |author-first1=David Andrew |author-link1=David Patterson (computer scientist) |author-first2=John Leroy |author-last2=Hennessy |author-link2=John L. Hennessy |title=Computer Organization and Design: The Hardware/Software Interface |edition=Second |isbn=1-55860-428-6 |___location=San Francisco, California, USA |publisher=[[Morgan Kaufmann Publishers]] |date=1998 |url=https://archive.org/details/computerorganiz000henn }}
* {{cite book |author-last=Stallings |author-first=William |author-link=William Stallings |title=Computer Organization and Architecture: Designing for performance |edition=Fifth |isbn=0-13-081294-3 |___location=New Jersey |publisher=[[Prentice-Hall, Inc.]] |date=2000 |url=https://archive.org/details/computerorganiza00will }}
* {{cite web |title=Advanced Arithmetic Techniques |author-first=John J. G. |author-last=Savard |date=2018 |orig-year=2006 |work=quadibloc |url=http://www.quadibloc.com/comp/cp0202.htm |access-date=2018-07-16 |
==External links==
* [http://www.geoffknagge.com/fyp/booth.shtml Radix-4 Booth Encoding]
* [https://web.archive.org/web/20171017093721/http://www.russinoff.com/libman/text/node65.html Radix-8 Booth Encoding] in [https://web.archive.org/web/20070927194831/http://www.russinoff.com/libman/ A Formal Theory of RTL and Computer Arithmetic]
* [http://www.ecs.umass.edu/ece/koren/arith/simulator/Booth/ Booth's Algorithm JavaScript Simulator]
* [
[[Category:1950 introductions]]
Line 109 ⟶ 114:
[[Category:1950 in science]]
[[Category:Binary arithmetic]]
[[Category:Computer arithmetic algorithms]]
[[Category:Multiplication]]
[[Category:Birkbeck, University of London]]
|