Physics processing unit: Difference between revisions

Content deleted Content added
ce
 
(3 intermediate revisions by 3 users not shown)
Line 3:
A '''physics processing unit''' ('''PPU''') is a dedicated [[microprocessor]] designed to handle the calculations of [[physics]], especially in the [[physics engine]] of [[video game]]s. It is an example of [[hardware acceleration]].
 
Examples of calculations involving a PPU might include [[rigid body dynamics]], [[soft body dynamics]], [[collision detection]], [[fluid dynamics]], hair and [[Cloth_modelingCloth modeling|clothing simulation]], [[finite element analysis]], and fracturing of objects.
 
The idea is having specialized processors offload time-consuming tasks from a computer's CPU, much like how a [[GPU]] performs graphics operations in the main CPU's place. The term was coined by [[Ageia]] to describe its [[PhysX]] chip. Several other technologies in the CPU-GPU spectrum have some features in common with it, although Ageia's product was the only complete one designed, marketed, supported, and placed within a system exclusively being a PPU.
Line 10:
An early academic PPU research project<ref>S. Yardi, B. Bishop, T. Kelliher, "[http://www.cs.scranton.edu/%7Ebishop/2006acmse.pdf HELLAS: A Specialised Architecture for Interactive Deformable Object Modeling]", ACM Southeast Conference, Melbourne, FL, March 10–12, 2006, pp. 56–61.</ref><ref>B. Bishop, T. Kelliher, "[http://www.cs.scranton.edu/%7Ebishop/TCSVT.ps Specialized Hardware for Deformable Object Modeling]," IEEE Transactions on Circuits and Systems for Video Technology, 13(11):1074–1079, Nov. 2003.</ref> named SPARTA (Simulation of Physics on A Real-Time Architecture) was carried out at Penn State<ref>{{cite web |url=http://www.cse.psu.edu/~mdl/sparta/ |title=SPARTA Homepage |publisher=Cse.psu.edu |access-date=2010-08-16 |url-status=dead |archive-url=https://web.archive.org/web/20100730051043/http://www.cse.psu.edu/~mdl/sparta/ |archive-date=2010-07-30 }}</ref> and University of Georgia. This was a simple [[FPGA]] based PPU that was limited to two dimensions. This project was extended into a considerably more advanced [[Application-specific integrated circuit|ASIC]]-based system named HELLAS.
 
February 2006 saw the release of the first dedicated PPU [[PhysX]] from [[Ageia]] (later merged into [[nVidia|Nvidia]]). The unit is most effective in accelerating [[particle systems]], with only a small performance improvement measured for rigid body physics.<ref>{{cite web|url=http://www.anandtech.com/show/2001/4 |archive-url=https://web.archive.org/web/20100908034558/http://www.anandtech.com/show/2001/4 |url-status=dead |archive-date=September 8, 2010 |title=Exclusive: ASUS Debuts AGEIA PhysX Hardware |publisher=AnandTech |access-date=2010-08-16}}</ref> The Ageia PPU is documented in depth in their US patent application #20050075849.<ref>{{cite web |title=United States Patent Application: 0050086040 |url=http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.html&r=1&f=G&l=50&s1=%2220050075849%22.PGNR.&OS=DN/20050075849&RS=DN/20050075849 |archive-url=https://web.archive.org/web/20200210071733/http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.html&r=1&f=G&l=50&s1=%2220050075849%22.PGNR.&OS=DN/20050075849&RS=DN/20050075849 |archive-date=2020-02-10 |access-date=2010-08-16 |publisher=Appft1.uspto.gov}}</ref> Nvidia/Ageia no longer produces PPUs and hardware acceleration for physics processing, although it is now supported through some of their graphics processing units.
 
<gallery class="center" caption="Academic PPU research projects">
File:SPARTA animation.jpg|alt=Example SPARTA animation|Example SPARTA animation
File:SPARTA board.jpg|alt=SPARTA printed circuit board|SPARTA [[Printed circuit board]]
File:Hellas die.jpg|alt=Hellas die photo|Hellas [[Die (integrated circuit)|die]] photo
</gallery>
 
Line 32:
[[ASUS]] and [[BFG Technologies]] bought licenses to manufacture alternate versions of AGEIA's PPU, the PhysX P1 with 128&nbsp;MB GDDR3:
* Multi-core device based on the [[MIPS architecture]] with integrated physics acceleration hardware and memory subsystem with "tons of cores"<ref>{{cite web |url=http://www.nvidia.com/object/physx_faq.html |title=PhysX FAQ |date=28 November 2018 |publisher=NVIDIA Corporation}}</ref><ref>{{cite web |url=http://www.blachford.info/computer/articles/PhysX2.html |title=Lets Get Physical: Inside The PhysX Physics Processor |author=Nicholas Blachford |date=2006}}</ref>
** 125 million [[transistor]]s<ref name="Legit Reviews">[http://www.legitreviews.com/article/346/2/ Legit Reviews - ASUS's AGEIA PhysX P1 Card]</ref>
** 182&nbsp;mm<sup>2</sup> [[die (integrated circuit)|die]] size
** Fabrication process: [[130 nanometer|130&nbsp;nm]]
Line 52:
 
==PPU vs. GPUs==
The drive toward [[GPGPU]] has made GPUs more suitable for the job of a PPU; DX10 added integer data types, unified shader architecture, and a geometry shader stage which allows a broader range of algorithms to be implemented; Modern GPUs support [[compute shader]]s, which run across an indexed space and don't require any graphical resources, just general purpose data buffers. NVidia [[CUDA]] provides a little more in the way of inter-thread communication and [[Scratchpad memory|scratchpad-style workspace]] associated with the threads.
 
Nonetheless GPUs are built around a larger number of longer latency, slower threads, and designed around texture and framebuffer data paths, and poor branching performance; this distinguishes them from PPUs and [[Cell (microprocessor)|Cell]] as being less well optimized for taking over game world simulation tasks.
Line 66:
* [[adapteva]]
* [[Digital signal processor]]
* [[General-purpose computing on graphics processing units (software)|General-purpose computing on graphics processing units]] (GPGPU) – for applications of existing GPUs to the same physics problems PPUs are designed for
* [[Microsoft Robotics Studio]]
* [[OpenCL]]
* [[PAL (software)|Physics Abstraction Layer]]
* [[Scratchpad RAM]] – relevant to the distributed memory architecture of the Ageia PhysX PPU
* [[Vision processing unit]]
* [UA6528 Price & Stock<ref>https://www.digipart.com/part/UA6528 UA6528 Price & Stock]</ref>
 
==References==