Programmable unijunction transistor: Difference between revisions

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|type = [[Passivity (engineering)|Passive]]

|working_principle =

|invented = [[General Electric]]<ref name="electroschematics.com">{{cite web
|url=https://www.electroschematics.com/6904/programmable-unijunction-transistor-put-flasher-circuit/|title=Programmable Unijunction Transistor Flasher|author=Jim Keith}}</ref>

|archive-url=https://web.archive.org/web/20180305053733/http://www.electroschematics.com/6904/programmable-unijunction-transistor-put-flasher-circuit/

|archive-date=2018-03-05

|url-status=deviated

|title=Programmable Unijunction Transistor Flasher

|author=Jim Keith

}}</ref>

|first_produced =

|symbol = [[Image:PUT symbol.png|120px]]

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[[File:UJT caratteristica.png|thumb|Graph of PUT characteristic curve, similar to UJT]]

A '''programmable unijunction transistor''' ('''PUT''') is a three-lead electronic [[semiconductor]] device which is similar in its characteristics to a [[unijunction transistor]] (UJT), except that its behavior can be controlled using external components. In a UJT, the base region is divided into two parts by the emitter. The two parts of the base form a [[voltage divider]], which sets the operating point of the UJT. That voltage divider can be programmed with two physical resistors connected to the gate terminal of the PUT. This allows the designer some control over the operating point of the PUT.<ref>{{cite web|url=https://www.daenotes.com/electronics/industrial-electronics/put-programmable-unijunction-transistor|title=PUT - Programmable Unijunction Transistor - Working, Construction, Biasing - D&E notes|website=www.daenotes.com|date=15 December 2017|url-status=dead|archive-url=https://web.archive.org/web/20180105205818/https://www.daenotes.com/electronics/industrial-electronics/put-programmable-unijunction-transistor|archive-date=2018-01-05}}</ref>

==Construction==

In construction, the programmable transistor is similar to the [[silicon controlled rectifier]] (SCR). ItLike SCR, it consists of four layers, two‒ pPNPN ‒ but its gate is connected to the second layer (N-type), layersnot andthe twothird none (P-type) layers inas equalwith proportionSCR.<ref name="electroschematics.com"/>

==Applications==