Content deleted Content added
Oranjelo100 (talk | contribs) No edit summary |
m Reverted edit by The Banner (talk) to last version by Tiggerjay |
||
(46 intermediate revisions by 26 users not shown) | |||
Line 8:
| list1 =
* [[Distributed computing]]
* [[Cloud computing]]
* [[
* [[Multiprocessing]]
* [[Manycore processor]]
* [[General-purpose computing on graphics processing units|GPGPU]]
* [[Computer network]]
* [[Systolic array]]
| group2 = Levels
Line 15 ⟶ 23:
* [[Bit-level parallelism|Bit]]
* [[Instruction-level parallelism|Instruction]]
* [[Task parallelism|
* [[Task parallelism|Task]]
* [[Data parallelism|Data]]
* [[Memory-level parallelism|Memory]]
* [[Loop-level parallelism|Loop]]
* [[Pipeline (computing)|Pipeline]]
| group3 = [[Multithreading (computer architecture)|Multithreading]]
| list3 =
* [[Temporal multithreading|Temporal]]
* [[Simultaneous multithreading|Simultaneous]] (SMT)
* [[
* [[
* [[Preemption (computing)|Preemptive]]
* [[Computer multitasking#Cooperative multitasking|Cooperative]]
* [[Bulldozer (microarchitecture)#Bulldozer core|Clustered multi-thread]] (CMT)
* [[Hardware scout]]
| group4 = Theory
| list4 =
* [[Parallel
* [[Parallel external memory|PEM model]]
* [[Analysis of parallel algorithms]]
* [[Amdahl's law]]
Line 45 ⟶ 59:
* [[Fiber (computer science)|Fiber]]
* [[Instruction window]]
* [[Array (data structure)|Array]]
| group6 = Coordination
| list6 =
* [[Multiprocessing]]
* [[Memory coherence
* [[Cache coherence
* [[Cache invalidation]]
* [[Barrier (computer science)|Barrier]]
Line 58 ⟶ 73:
| group7 = [[Computer programming|Programming]]
| list7 =
* [[Stream
* [[Dataflow programming]]
* [[Parallel programming model|Models]]
Line 69 ⟶ 84:
| list8 =
* [[Flynn's taxonomy]]
** [[Single instruction, single data|SISD]]
** [[Single instruction, multiple data|SIMD]]
*** [[Single instruction, multiple threads|Array processing]] (SIMT)
** [[SIMT]]▼
*** [[Flynn's taxonomy#Pipelined processor|Pipelined processing]]
** [[MISD]]▼
*** [[Flynn's taxonomy#Associative processor|Associative processing]]
** [[MIMD]]▼
** [[Multiple instruction, single data|MISD]]
*[[Dataflow architecture]]▼
** [[Multiple instruction, multiple data|MIMD]]
▲* [[Dataflow architecture]]
* [[Instruction pipelining|Pipelined processor]]
* [[Superscalar processor]]
* [[Vector processor]]
* [[Multiprocessing|Multiprocessor]]
** [[Symmetric multiprocessing|symmetric]]
** [[Asymmetric multiprocessing|asymmetric]]
Line 88 ⟶ 105:
** [[Non-uniform memory access|NUMA]]
** [[Cache-only memory architecture|COMA]]
* [[Massively parallel
* [[Computer cluster]]
** [[Beowulf cluster]]
* [[Grid computing|Grid computer]]
* [[Hardware acceleration]]
| group9 = [[
| list9 =
* [[Ateji PX]]
* [[Boost (C++ libraries)
* [[Chapel (programming language)|Chapel]]
* [[Cilk]]
* [[Coarray Fortran]]
* [[CUDA]]
* [[Dryad (programming)|Dryad]]
* [[C++ AMP]]
* [[Global Arrays]]
* [[GPUOpen]]
* [[Message Passing Interface|MPI]]
* [[OpenMP]]
* [[OpenCL]]
* [[OpenHMPP]]
* [[OpenACC]]
* [[Parallel Extensions
▲* [[Parallel LINQ|PLINQ]]
* [[Parallel Virtual Machine|PVM]]
* [[
* [[RaftLib]]
* [[Unified Parallel C|UPC]]
* [[Threading Building Blocks|TBB]]
* [[ZPL (programming language)|ZPL]]
| group10 = Problems
| list10 =
* [[Automatic parallelization]]
▲* [[Embarrassingly parallel]]
* [[Deadlock (computer science)|Deadlock]]
* [[Software lockout]] ▼
* [[Scalability]] ▼
* [[Race_condition#Computing|Race condition]] ▼
* [[Deterministic algorithm]]
* [[Embarrassingly parallel]]
* [[Parallel slowdown]]
* [[Starvation (computer science)|Starvation]]
| below =
* {{category-inline|
}}<noinclude>{{doc|content=
{{collapsible option}}
==See also==
*{{tl|
[[Category:Computing navigational boxes]]
▲[[Category:Parallel computing|τ]]
}}</noinclude>
|