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Guy Harris (talk | contribs) →Control flow operations: A skip is more like a forward conditional branch with a fixed offset; for predication I tend to think of the predicate as being part of the instruction itself, rather than the previous instruction. They can skip more than one instruction (the IBM 704 and successors had a "Compare Accumulator and Storage" instruction that skipped either 0, 1, or 2 instructions based on whether AC < M, AC = M, or AC > M). |
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{{Machine code}}
An '''instruction set architecture''' ('''ISA''') is an [[abstract model]] that defines the programmable [[interface (computing)|interface]] of the [[CPU]] of a computer; how [[software]] can control a computer.<ref>{{Cite web |title=GLOSSARY: Instruction Set Architecture (ISA) |url=https://www.arm.com/glossary/isa |archive-url=https://web.archive.org/web/20231111175250/https://www.arm.com/glossary/isa |archive-date=2023-11-11 |access-date=2024-02-03 |website=arm.com}}</ref> A device (i.e. CPU) that interprets instructions described by an ISA is an [[implementation]] of that ISA. Generally, the same ISA is used for a family of related CPU devices.
In general, an ISA defines the [[Machine code|instructions]], [[data type]]s, [[Register (computer)|registers]], the hardware support for managing [[Computer memory|main memory]],{{Clarify|date=April 2024|reason=See "What does "Hardware support for managing main memory" refer to?" on the talk page.
An ISA specifies the behavior implied by [[machine code]] running on an implementation of that ISA in a fashion that does not depend on the characteristics of that implementation, providing [[binary compatibility]] between implementations. This enables multiple implementations of an ISA that differ in characteristics such as [[Computer performance|performance]], physical size, and monetary cost (among other things), but that are capable of running the same machine code, so that a lower-performance, lower-cost machine can be replaced with a higher-cost, higher-performance machine without having to replace software. It also enables the evolution of the [[microarchitecture]]s of the implementations of that ISA, so that a newer, higher-performance implementation of an ISA can run software that runs on previous generations of implementations.
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*Load/store data to and from a coprocessor or exchanging with CPU registers.
*Perform coprocessor operations.
===Complex instructions===
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