Cadence Design Systems: Difference between revisions

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Founded in 1983 in [[San Jose, California]],<ref name="OriginalRef_Sorkin_nytim.com"/> Cadence Design Systems began as an [[Electronic design automation|electronic design automation (EDA)]] company named Solomon Design Automation (SDA).<ref name="OriginalRef_NYTStaff1_nytimes.com"/> SDA's cofounders included [[James Solomon]], [[A. Richard Newton|Richard Newton]],<ref name="OriginalRef_NYTStaff1_nytimes.com"/> and [[Alberto Sangiovanni-Vincentelli]].<ref name="OriginalRef_NYTStaff1_nytimes.com"/><ref>{{Cite web|url=https://www.eetimes.com/author.asp?section_id=67&doc_id=1285941|title=Alberto Sangiovanni-Vincentelli receives EDAA Lifetime Achievement Award|last=Bailey|first=Brian|date=December 20, 2017|website=EE Times}}</ref> Cadence was formed by the merger of SDA and [[ECAD, Inc.|ECAD]]. A public company,<ref name="OriginalRef_NYTStaff1_nytimes.com"/> ECAD had been co-founded by Ping Chao, Glen Antle, and Paul Huang in 1982.<ref name="OriginalRef_NYTStaff1_nytimes.com"/>{{Not in source|date=March 2024}} Cadence Design Systems was officially formed through the 1988 merger of SDA and ECAD,<ref name="OriginalRef_NYTStaff1_nytimes.com"/> with [[Joseph Costello (software executive)|Joseph Costello]] appointed both CEO and president of the newly combined company. After the merger, Cadence began trading on the [[New York Stock Exchange]] and Costello oversaw further mergers and acquisitions.<ref name="OriginalRef_NYTStaff1_nytimes.com">NYTimes [https://www.nytimes.com/1991/10/04/business/business-people-a-fun-chief-at-cadence-is-serious-merger-man.html A Fun Chief at Cadence Is Serious Merger Man] Retrieved October 4, 1991</ref>

In 1989, the company acquired [[Gateway Design Automation]] for $72 million.<ref name="OriginalRef_staff_nytimes.com_gateway"/> In 1990 it acquired Automated Systems Inc., and in doing so added "board design to its existing line of chip design software."<ref name="OriginalRef_Staff4_nytimes.com"/> In 1991, Cadence acquired its rival [[SCALD|Valid Logic Systems]] for around $200 million, its biggest acquisition yet. The revenues of the combined company were $390 million, making Cadence "the largest provider of the software used by electronic engineers to design computer chips and circuit boards," according to the ''New York Times.''<ref name="OriginalRef_NYTStaff1_nytimes.com"/>

In 1996, Cadence acquired High Level Design Systems,<ref name="Ref_staff10_nytimes.com"/> at which point Cadence had 3,300 employees and $742 million in annual revenue. Following the resignation of Cadence's original CEO Joe Costello in 1997, Jack Harding was appointed CEO.<ref>WSJ [https://www.wsj.com/articles/SB877391809854588000 Cadence's Costello Steps Down As CEO to Join Software Firm] Retrieved October 21, 1997</ref> Ray Bingham was named CEO in 1999.<ref>EETimes [https://www.eetimes.com/harding-replaced-as-cadence-president/ Harding replaced as Cadence president] Retrieved April 27, 1999</ref> Cadence purchased Ambit Design Systems for $260 million, which made tools for [[system-on-a-chip]] technology, in 1998,<ref name="Ref_Nellis2_Reuters.com"/> and [[OrCAD Systems]] in 1999.<ref name="OriginalRef_staff6_eetimes"/> AfterCadence acquiring [[Assignoracquired estoppel|Quickturn Design]] Systems in 1999, Cadence was described as a "white knight" for the act by the ''New York Times'', as Quickturn had been subject topreventing a [[hostile takeover]] attempt by Cadence's rival [[Mentor Graphics]].<ref name="OriginalRef_Staff3_nytimes.com"/>

===2000–2019===

Under urging by executives such as Jim Hogan and executive vice president [[Penny Herscher]], between 2001 and 2003, Cadence purchased a number of implementation tools through acquisition, such as Silicon Perspective, Verplex,<ref name="Ref_staff13_EETImes.com"/> and [[Chenming Hu|Celestry Design]].<ref name="OriginalRef_staff4_edn.com"/> The acquisitions were apparently in part to counter the 2001 purchase of [[Synopsys#Avanti Corporation|Avanti]] by [[Synopsys]], as Synopsys had become their primary market rival.<ref name="Ref_staff13_EETImes.com"/> In 2004, Mike Fister became Cadence's new CEO and president, with Ray Bingham becoming chairman. The former chairman, Donald L. Lucas, remained on the Cadence board.<ref>WSJ [https://www.wsj.com/articles/SB108439313804409685 Intel's Michael Fister Resigns To Take Top Job at Cadence] Retrieved May 13, 2004</ref> Between 2004 and 2007, Cadence purchased four companies, including the software developer [[Rob A. Rutenbar|Verisity]], and in 2006, it spent $1 billion in [[stock buyback]]s.<ref name="OriginalRef_Sorkin_nytim.com"/>

In 2007, Cadence announced it would be introducing a new chip-making process that laid wires diagonally as well as horizontally and vertically, arguing it would make its designs more efficient. In June 2007, Cadence had a market value of around $6.4 billion. That year, Cadence was rumored to be in talks with [[Kohlberg Kravis Roberts]] and [[Blackstone Group]] regarding a possible sale of the company.<ref name="OriginalRef_Sorkin_nytim.com">[https://www.nytimes.com/2007/06/04/technology/04chip.html Specialized Software Maker Is Said to Be in Buyout Talks], Andrew Ross Sorkin and Michael J. de la Merced, ''The New York Times'', Published: June 4, 2007</ref> Cadence withdrew a $1.6 billion offer to purchase Mentor Graphics in 2008.<ref>{{cite web|url=http://www.cadence.com/cadence/newsroom/press_releases/Pages/pr.aspx?xml=081508_announcement|title=Cadence Withdraws Proposal to Acquire Mentor Graphics}}</ref> Also that year, Cadence's board appointed [[Lip-Bu Tan]] as acting CEO, after the resignation of Mike Fister; Tan had served on the Cadence board of directors since 2004.<ref>IConnect007 [http://design.iconnect007.com/index.php/article/30109/cadence-ceo-mike-fister-resigns/30112/?skin=design Cadence CEO Mike Fister Resigns] Retrieved October 15, 2008</ref> In January 2009, the board of directors of Cadence voted unanimously to confirm Lip-Bu Tan as president and CEO.<ref>EETimes [https://www.eetimes.com/lip-bu-tan-named-cadence-ceo/ Lip-Bu Tan named Cadence CEO] Retrieved January 8, 2009</ref> In 2011, it purchased [[Altos Design Automation]].<ref name="OriginalRef_eetimesstaff3_eetimes.com"/> Subsequent notable acquisitions included [[Cosmic Circuits]]<ref name="OriginalRef_eenewseuropestaff1_eenewseurope.com"/> and [[Tensilica]] in 2013,<ref name="OriginalRef_staff4_eetimes.com"/> [[Forte Design Systems]] in 2014,<ref name="OriginalRef_New_newelectronics.co"/> and the [[AWR Corporation]] in 2019.<ref name="OriginalRef_Staff_bizjournals.com"/>

===2020–2025===

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In January 2025, Cadence announced the acquisition of [[:fr:Secure-IC|Secure-IC]], an embedded security IP platform provider; the acquisition is expected to close by mid-2025, following the usual regulatory approvals and other closing conditions, and be immaterial to 2025 revenue and earnings.<ref>{{cite news |last=Clarke |first=Peter |title=Cadence to acquire French security specialist Secure-IC |url=https://www.eenewseurope.com/en/cadence-to-acquire-french-security-specialist-secure-ic/ |website= eenews |date=2025-01-23 |accessdate=2025-02-02 }}</ref>

In mid-2025, the [[Second presidency of Donald Trump|Trump administration]] briefly paused the issuing of licenses for exports of CadenceAmerican EDA software to China, including Cadence products.<ref>{{Cite news |last=Swanson |first=Ana |date=2025-05-28 |title=U.S. Pauses Exports of Airplane and Semiconductor Technology to China |url=https://www.nytimes.com/2025/05/28/business/economy/jet-engine-chip-software-exports-to-china.html |access-date=2025-05-29 |work=[[The New York Times]] |language=en-US |issn=0362-4331}}</ref><ref>{{Cite news |last=Hawkins |first=Mackenzie |date=2025-07-02 |title=US Lifts Chip Design Software Curbs on China in Trade Deal |url=https://www.bloomberg.com/news/articles/2025-07-03/siemens-says-us-has-rescinded-chip-software-curbs-on-china |url-access=subscription |access-date=2025-07-03 |publisher=[[Bloomberg News]]}}</ref> In July 2025, it was announced that Cadence would plead guilty to violating U.S. [[export controls]] and pay US$140 million.<ref name="reuters_china">{{Cite news |last=Freifeld |first=Karen |date=2025-07-28 |title=Exclusive: Cadence to plead guilty and pay $140 million to US for China sales |url=https://www.reuters.com/world/china/cadence-plead-guilty-pay-140-million-us-china-sales-2025-07-28/ |access-date=2025-07-30 |work=[[Reuters]] |language=en}}</ref>

==Products==

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===Integrated circuit software===

The company develops a number of technologies for creating custom integrated circuits. For example, its '''Virtuoso Platform''',<ref name="OriginalRef_Staff_colorado.edu"/> later renamed '''Virtuoso Studio,'''<ref name="2024-03-19-C">{{Citation|title=Virtuoso Studio |publisher=Cadence |url=https://www.cadence.com/en_US/home/tools/custom-ic-analog-rf-design/virtuoso-studio.html }}</ref> incorporates tools for designing full-custom [[integrated circuit]]s.<ref name="OriginalRef_Staff_colorado.edu">{{Cite web |url=http://ece-www.colorado.edu/~ecen5007/software.html |title=Course description from University of Colorado |access-date=2007-06-10 |archive-url=https://web.archive.org/web/20070624084120/http://ece-www.colorado.edu/~ecen5007/software.html |archive-date=2007-06-24 |url-status=dead }}</ref> In 2019, Cadence introduced its '''[[Spectre Circuit Simulator|Spectre X]]''' parallel circuit simulator, so that users could distribute time- and frequency-___domain simulations across hundreds of CPUs for speed.<ref>New Electronics [https://www.newelectronics.co.uk/electronics-news/cadence-looks-to-boost-simulation-performance-with-the-spectre-x-simulator/215884/ Cadence looks to boost simulation performance with the Spectre X Simulator] Retrieved June 3, 2019</ref> Cadence also developedoffers '''AWR''', a [[radio frequency]] to [[extremely high frequency|millimeter wave]] design environment for designing [[5G]]/[[wireless]] products. AWR is used for communications, aerospace and defense, semiconductor, computer, and consumer electronics.<ref>Chin, Spencer (December 5, 2019). [https://www.fierceelectronics.com/electronics/cadence-acquires-awr-from-ni-to-bolster-5g-presence"Cadence acquires AWR from NI to bolster 5G presence"] ''Fierce Electronics'' Retrieved September 6, 2021</ref><ref>Levitsky, Allison (December 2, 2019). [https://www.bizjournals.com/sanjose/news/2019/12/02/cadence-design-systems-to-acquire-awr-corp-from.html"Cadence Design Systems to acquire AWR Corp. from National Instruments for $160M"] ''Silicon Valley Business Journal'' Retrieved September 6, 2021</ref>

===Digital implementation and signoff===

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===Hardware emulation===

In 2015, Cadence announced the '''Palladium''' Z1 [[hardware emulation]] platform,<ref>EE Journal [https://www.eejournal.com/article/20160606-emulation/ State of Emulation] Retrieved June 6, 2016</ref> withfor over 100 million gates per hour compile speed, and greater than 1&nbsp;MHz execution forverifying billion-gate designs.<ref>Electronic Specifier [https://www.electronicspecifier.com/products/design-automation/enterprise-emulation-platform-develops-supercomputer Enterprise Emulation Platform Develops Supercomputer] Retrieved October 26, 2016</ref> which was based on emulation technology from Cadence's 1998 acquisition of Quickturn.<ref name="OriginalRef_Staff3_nytimes.com">NY Times [https://www.nytimes.com/1998/12/10/business/cadence-to-acquire-quickturn-design.html Cadence to Acquire Quickturn Design] Retrieved 36137</ref> Cadence announced Palladium Z2 in 2021, claimingas a 1.5Xsuccessor performanceto andthe 2XZ1 capacityplatform improvementwith overimproved the Z1performance.<ref>Neowin [https://www.neowin.net/news/cadences-latest-palladium-and-protium-dynamic-duo-to-offer-2x-capacity-and-15x-gains/ Cadence's latest Palladium and Protium "dynamic duo" to offer 2X capacity and 1.5X gains] Retrieved Apr 5, 2021</ref><ref>EENews Europe [https://www.eenewseurope.com/news/cadence-boosts-its-emulation-and-verification-systems Cadence boosts its emulation and verification systems] Retrieved Apr 5, 2021</ref>

The '''Protium''' [[FPGA prototyping]] platform was introduced in 2014,<ref>EDN [https://www.edn.com/cadence-unveils-protium-fpga-based-soc-prototyping-platform/ Cadence unveils Protium FPGA-based SoC prototyping platform] Retrieved July 14, 2014</ref> followed by the Protium S1 in 2017, which was built on [[Xilinx]] Virtex UltraScale [[FPGAs]].<ref>EET Asia [https://www.eetasia.com/multi-core-parallel-engine-powers-cadence-simulator/ Multi-core parallel engine powers Cadence simulator] Retrieved March 1, 2017</ref> Protium X1 rack-based prototyping was introduced in 2019,<ref>Tech Design Forum [https://www.techdesignforums.com/blog/2019/05/28/cadence-expands-protium-for-rack-based-prototyping/ Cadence Expands Protium for Rack-Based Prototyping] Retrieved May 28, 2019</ref> which Cadence claimed supported a 1.2 billion gate SoCs at around 5&nbsp;MHz.<ref>Electronics Weekly [https://www.electronicsweekly.com/news/design/eda-and-ip/cadence-machine-can-prototype-1bn-gate-soc-fpgas-2019-05/ Cadence machine can prototype a 1bn gate SoC on FPGAs] Retrieved May 29, 2019</ref> with Palladium S1/X1 and Protium sharing a single compilation flow.<ref>EE Journal [https://www.eejournal.com/article/cadence-eda-update/ Cadence EDA Update] Retrieved May 8, 2017</ref> In 2021, Protium X2 was announced; Cadence claimed a 1.5X performance and 2X capacity improvement over Protium X1.<ref>Embedded [https://www.embedded.com/cadence-speeds-billion-gate-soc-verification/ Cadence speeds billion gate SoC verification] Retrieved Apr 7, 2021</ref><ref>New Electronics [https://www.newelectronics.co.uk/electronics-news/cadence-unveils-next-generation-palladium-z2-and-protium-x2-systems/236026/ Cadence unveils next-generation Palladium Z2 and Protium X2 systems] Retrieved Apr 6, 2021</ref>

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{{See also|Tensilica#Cadence Tensilica products}}

Cadence supplies [[semiconductor intellectual property]] (SIP) blocks, covering [[Interface_(object-oriented_programming)|interface]] design, [[USB]], [[MIPI]], [[ethernet]],<ref>{{cite news |date=2024 |title=Interface IP |url=https://www.cadence.com/en_US/home/tools/ip/design-ip/interface-ip.html |work=Cadence Home Website |access-date=March 13, 2024}}</ref> memory, analog, [[System on a chip|SoC]] peripherals, and [[data plane]] processing units. Cadence also develops chip [[Functional verification|verification]] technologies including simulators and [[formal verification]] tools.{{cn|date=March 2024}} Cadence develops '''[[Tensilica]]''' [[Digital signal processor|DSP]] processors for audio, vision, wireless modems, and convolutional neural nets. Tensilica DSP processors IP in 2019<ref>{{Cite web|url=https://ip.cadence.com/ipportfolio/tensilica-ip|title=Tensilica Customizable Processor and DSP IP|website=ip.cadence.com|access-date=2019-05-16}}</ref> included: Tensilica Vision DSPs for [[Image processor|imaging]], [[Vision processing unit|vision]], and [[AI accelerator|AI]] processing;<ref>AnandTech [https://web.archive.org/web/20190515183857/https://www.anandtech.com/show/14337/cadence-announces-tensilica-vision-q7-dsp Cadence Announces Tensilica Q7 DSP] Retrieved May 15, 2029</ref><ref>Embedded [https://www.embedded.com/cadence-tensilica-vision-q7-dsp-ip-doubles-vision-and-ai-performance-for-automotive-ar-vr-mobile/ Cadence: Tensilica Vision Q7 DSP IP doubles vision and AI performance for automotive, AR/VR mobile] Retrieved May 16, 2019</ref> Tensilica HiFi DSPs for audio processing;<ref>eeNews Embedded [https://www.eenewsembedded.com/news/cadence-tensilica-hifi-5-dsp-audio-and-voice-processing Cadence Tensilica HiFi 5 DSP for audio and voice processing ] Retrieved November 1, 2018</ref><ref>EE Journal [https://www.eejournal.com/article/watching-ai-evolve/ Watching AI Evolve] Retrieved November 12, 2018</ref> Tensilica Fusion DSPs for [[Internet of things|IoT]];<ref>Engineering.com [https://www.engineering.com/ElectronicsDesign/ElectronicsDesignArticles/ArticleID/13267/Electronics-Weekly-Microsemi-PLLs-IDT-Load-Reduced-DIMM-More.aspx Cadence Announces Availability of Tensilica Xtensa LX7 Processor Architecture] Retrieved September 30, 2016</ref> Tensilica ConnX DSPs for [[radar]], [[lidar]], and communications processing;<ref>Embedded Computing Design [https://www.embedded-computing.com/automotive/cadence-tensilica-connx-b20-dsp-ip-boosts-performance-for-automotive-radar-lidar-and-5g Cadence's Tensilica ConnX B20 DSP IP Boosts Performance for Automotive Radar/Lidar and 5G] Retrieved March 8, 2019</ref><ref>Electronics Weekly [https://www.electronicsweekly.com/news/design/eda-and-ip/cadence-ups-dsp-throughput-5g-comms-automotive-radar-lidar-2019-03/ Cadence ups DSP throughput for 5G comms, and automotive radar and lidar] Retrieved March 7, 2019</ref> and Tensilica DNA Processor Family for [[AI accelerator|AI acceleration]].<ref>AnandTech [https://web.archive.org/web/20180919201518/https://www.anandtech.com/show/13377/cadence-announces-tensilica-dna-100-a-bigger-nn-ip Cadence Announces The Tensilica DNA 100 IP: Bigger Artificial Intelligence] Retrieved September 19, 2018</ref><ref>Electronic Design [https://www.electronicdesign.com/technologies/embedded-revolution/article/21807054/cadences-deepneuralnetwork-processor-pushes-to-34-tmacsw Cadence's Deep-Neural-Network Processor Pushes to 3.4 TMACs/W] Retrieved September 26, 2018</ref> In 2021, Cadence launched the Tensilica AI Platform to accelerate AI SoC development and improve performances.<ref>HelpNet Security [https://www.helpnetsecurity.com/2021/09/15/cadence-tensilica-ai-platform/ Cadence Tensilica AI Platform accelerates intelligent SoC development] Retrieved Sep 15, 2021</ref>

===PCB and packaging technologies===

The company hasprovides aseveral numbertools for the design of [[printed circuit board]]s (PCB) and packagingof technologies[[IC forform designingfactor|chip circuit boardspackages]]. Its '''Allegro Platform''' has tools forcovers co-design of [[integrated circuit]]s, [[IC form factor|packages]], and PCBs on industrial scale. The '''[[OrCAD|OrCAD/PSpice]]''' hasproduct toolsline foraims at smaller design teams and individual PCB designers.<ref name="UNIX">{{cite web|url=http://www.doe.carleton.ca/facilities/computer_help/internal/software.php|title=UNIX Software and CAD tools|publisher=Carleton University|access-date=2007-06-10|archive-url=https://web.archive.org/web/20120503235221/http://www.doe.carleton.ca/facilities/computer_help/internal/software.php|archive-date=2012-05-03|url-status=dead}}</ref> '''OrbitIO Interconnect Designer''' is a die/package planning & route optimization tool.<ref>Schilling, Andreas (May 2, 2018). [https://www-hardwareluxx-de.translate.goog/index.php/news/hardware/prozessoren/46297-multi-chip-ansatz-tsmc-stapelt-mehrere-wafer-uebereinander.html?_x_tr_sl=auto&_x_tr_tl=en&_x_tr_hl=en-US&_x_tr_pto=nuiMulti-chip approach: TSMC stacks several wafers on top of each other] Hardware LuxxRetrieved May 2, 2018</ref> '''InspectAR''' uses [[augmented reality]] to map out complicated [[circuit board]] electronics for real-time labelling of board [[schematics]].<ref>Kirkwood, Isabelle [https://betakit.com/newfoundlands-inspectar-acquired-by-cadence-design-systems/ Newfoundland's InspectAR Acquired By Cadence Design Systems] BetaKit Retrieved Aug 13, 2020</ref>

===Systems design and analysis===

The company has a number of tools for [[system analysis]]. '''[[Sigrity]]''' hasoffers tools for signal, power integrity, and thermal integrity analysis and IC package design.<ref name="eetimes.com">EE Times [https://www.eetimes.com/cadence-pays-80-million-to-buy-signal-integrity-firm/ Cadence Pays $80 million to buy signal integrity firm] Retrieved July 3, 2012</ref> Introduced in April 2019 as part of Cadence's expansion into system analysis, '''Clarity''' is a 3D [[field solver]] for electromagnetic analysis, that uses distributed [[Adaptive mesh refinement|adaptive meshing]] to partition jobs across multiple cores.<ref>{{Cite web|url=https://www.eetimes.com/cadence-eyes-system-analysis-market/|title=Cadence Eyes System Analysis Market|last=McGrath|first=Dylan|date=2 April 2019|website=EE Times}}</ref> In September 2019, Cadence announced '''Celsius''', a parallel architecture thermal solver that uses [[Finite element method| finite element analysis]] for solid structures and [[computational fluid dynamics]] (CFD) for fluids.<ref>EE News Embedded [https://www.eenewsembedded.com/news/Cadence-Celsius-Thermal-Solver-complete-electrical-thermal-co-simulation-system-analysis Complete Electrical-thermal co-simulation for system analysis ] Retrieved September 19, 2019</ref>

'''Cascade Technologies, Inc''' includes hi-fidelity CFD solvers for multiphysics analysis of turbulence fluid flow.<ref name="CascadeCFDBlog">[https://community.cadence.com/cadence_blogs_8/b/cfd/posts/cadence-welcomes-cascade-technologies-1221740980 Cascade CFD Blog]</ref> Acquired by Cadence from Pointwise in 2021, '''Fidelity Pointwise''' is for computational fluid dynamics (CFD) mesh generation.<ref name="eeNewsPointwise">eeNews [https://www.eenewseurope.com/news/onespin-deal-leads-flurry-eda-acquisitions/page/0/1 OneSpin deal leads flurry of EDA acquisitions: Page 2 of 3] Retrieved Apr 15, 2021</ref>

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==Recognition==

In 2016, former Cadence CEO [[Lip-Bu Tan]] was awarded the Dr. Morris Chang Exemplary Leadership Award by the Global Semiconductor Alliance.<ref>GSA Website [https://www.gsaglobal.org/wp-content/uploads/gsa-event-archives/2016awardsdinner/morris-chang-winner/index.html Dr. Morris Chang Exemplary Leadership Award Winner] {{Webarchive|url=https://web.archive.org/web/20210126114055/https://www.gsaglobal.org/wp-content/uploads/gsa-event-archives/2016awardsdinner/morris-chang-winner/index.html |date=2021-01-26 }} Retrieved November 28, 2020</ref> In 2019, ''[[Investor's Business Daily]]'' ranked Cadence Design Systems #5 on its 50 Best Environmental, Social, and Governance (ESG) Companies list.<ref>{{Cite web |date=2 December 2019 |title=50 Best ESG Companies: A List Of Today's Top Stocks for Environmental, Social and Governance Values |url=https://www.investors.com/research/best-esg-companies-top-stocks-environmental-social-governance-values/ |website=Investor's Business Daily}}</ref> In 2020, Cadence ranked #45 on ''[[People (magazine)|People]]'' magazine's Companies that Care list.<ref>Great Place to Work [https://www.greatplacetowork.com/best-workplaces/companies-that-care/2020 People Companies that Care 2020] Retrieved November 28, 2020</ref> ''[[Fortune (magazine)|Fortune]]'' magazine named Cadence to its 100 Best Companies to Work For list for the sixth consecutive year in 2020.<ref>{{Cite web |title=Cadence |url=https://fortune.com/best-companies/2020/cadence |access-date=2020-04-28 |website=Fortune |language=en}}</ref> In 2021, Anirudh Devgan was awarded the prestigious IEEE/SEMI Phil Kaufman award and in 2022 was inducted into National Academy of Engineering.

== Sponsorship ==

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|}

==Lawsuits Controversies ==

===Lawsuits===

*July 28, 2025 (Reuters) - Cadence Design (CDNS.O), opens new tab agreed to plead guilty and pay more than $140 million to resolve U.S. charges for selling its chip design products to a Chinese military university believed to be involved in simulating nuclear explosions, the Justice Department said on Monday. Cadence is accused of violating export controls by illegally selling chip design software and hardware to front companies representing China's National University of Defense Technology.

*'''Avanti Corporation'''{{main|Cadence Design Systems, Inc. v. Avanti Corp}} From 1995 until 2002, Cadence was involved in a [[Cadence Design Systems, Inc. v. Avanti Corp|6-year-long legal dispute]]<ref name="bw">[https://www.bloomberg.com/news/articles/2001-09-02/the-avant-saga-does-crime-pay Business Week (pay wall)] overview of the entire case, after the criminal trial but before the purchase by [[Synopsys]].</ref> with [[Avanti Corporation]] (brand name "Avant!"), in which Cadence claimed Avanti stole Cadence code, and Avanti denied it. According to Business Week ''"The Avanti case is probably the most dramatic tale of white-collar crime in the history of Silicon Valley"''.<ref name="bw" /> The Avanti executives eventually pleaded ''no contest'' and Cadence received several hundred million dollars in restitution. Avanti was then purchased by [[Synopsys]], which paid $265 million more to settle the remaining claims.<ref>[http://www.eedesign.com/article/showArticle.jhtml?articleId=10806192 EEDesign article] about the final settlement.</ref> The case resulted in a number of [[legal precedent]]s.<ref>[http://direct.bl.uk/research/05/0C/RN149436533.html Cadence v. Avanti: The UTSA and California Trade Secret Law] {{Webarchive|url=https://archive.today/20120707114217/http://direct.bl.uk/research/05/0C/RN149436533.html |date=2012-07-07 }}, Danley, J., Berkeley Technology Law Journal, 2004, Vol 19; Part 1, pages 289-308</ref>

*'''Aptix Corporation''' Quickturn Design Systems, a company acquired by Cadence, was involved in a series of legal events with Aptix Corporation. Aptix licensed a patent to [[Mentor Graphics]] and the two companies jointly sued Quickturn over an alleged patent infringement. Amr Mohsen, CEO of Aptix, forged and tampered with legal evidence and was subsequently charged with conspiracy, perjury, and obstruction of justice. Mohsen was arrested after violating his bail agreement by attempting to flee the country. While in jail, Mohsen plotted to intimidate witnesses and kill the federal judge presiding over his case.<ref>[https://www.nytimes.com/2005/03/20/us/in-courts-threats-have-become-a-fact-of-life.html In Courts, Threats Become Alarming Fact of Life], Deborah Sontag, ''The New York Times'', 20 March 2005</ref> Mohsen was further charged with attempting to delay a federal trial by feigning incompetency.<ref>[http://www.eetimes.com/electronics-news/4049672/Odd-legal-saga-takes-an-ugly-turn Odd legal saga takes an ugly turn], Richard Goering, ''[[EE Times]]'', 02 August 2004</ref><ref>[http://www.eetimes.com/news/design/business/showArticle.jhtml?articleID=181401328 Jury finds Mohsen guilty of perjury, obstruction of justice], Dylan McGrath, ''[[EE Times]]'', 28 February 2006</ref> Due to the overwhelming misconduct, the judge ruled the lawsuit as unenforceable and Mohsen was sentenced to 17 years in prison.<ref>Bailey, Brian (September 6, 2011). [https://www.eetimes.com/amr-mohsen-a-story-so-bizarre/ "Amr Mohsen – A story so bizarre…"] EETimesRetrieved September 5, 2021</ref> Mentor Graphics subsequently sued Aptix to recoup legal costs. Cadence also sued Mentor Graphics and Aptix to recover legal costs.<ref>Santarini, Michael (February 19, 2003). [https://www.eetimes.com/mentor-loses-patent-suit-against-cadence/ "Mentor loses patent suit against Cadence"] EETimesRetrieved September 5, 2021</ref>

*'''Berkeley Design Automation''' In 2013, Cadence sued Berkeley Design Automation (BDA) for circumvention of a license scheme to link its Analog FastSpice (AFS) simulator to Cadence's Analog Design Environment (Virtuoso ADE).<ref>[https://www.eetimes.com/cadence-sues-berkeley-design-automation Cadence sues Berkeley Design Automation], Dylan McGrath, ''[[EE Times]]'', 15 April 2013</ref> The lawsuit was settled less than one year later with an undisclosed payment of BDA and a multi-year agreement to support interoperability of AFS with ADE through Cadence's official interface. BDA was bought by [[Mentor Graphics]] a few months later.<ref>[https://www.eenewseurope.com/news/mentor-buys-berkeley-da-after-cadence-lawsuit Mentor buys Berkeley DA after Cadence lawsuit], Peter Clarke, eeNews Europe, 24 March 2014</ref>

=== Export control violations and Chinese military university sales ===

In July 2025, Cadence Design Systems agreed to plead guilty to criminal charges and pay over $140 million in combined penalties for illegally exporting semiconductor design technology to China's [[National University of Defense Technology]] (NUDT), a military university controlled by [[China's Central Military Commission|China's Central Military Commission]].<ref name="reuters_china"/> According to the [[U.S. Department of Justice]] and [[Bureau of Industry and Security]], Cadence's Chinese subsidiary knowingly sold Electronic Design Automation (EDA) hardware, software, and semiconductor design technology valued at over $45 million to NUDT between 2015 and 2021, despite the university being placed on the U.S. Entity List in February 2015 due to its use of American technology for supercomputers "believed to support nuclear explosive simulation and military simulation activities."<ref>{{cite news|url=https://www.rcrwireless.com/20250731/test-and-measurement/cadence-fines|title=Cadence hit with $140.6 million in fines for tech export violations|date=2025-07-30|publisher=RCR Wireless News|accessdate=2025-08-24}}</ref><ref>{{cite news|url=https://govconexec.com/2025/07/cadence-design-settles-illegal-tech-transfer-to-china/|title=Cadence Design Settles Export Violation Charge|date=2025-07-28|publisher=GovCon Executive|accessdate=2025-08-24}}</ref>

The violations involved employees at Cadence's Chinese subsidiary using intermediary companies, including Central South CAD Center (CSCC) and later Phytium Technology, to disguise sales to the restricted military university.<ref>{{cite news|url=https://www.wilmerhale.com/en/insights/client-alerts/20250806-the-latest-doj-export-control-enforcement-action-highlights-china-risks|title=Latest DOJ Export Control Enforcement Action Highlights China Risks|date=2025-08-05|publisher=WilmerHale|accessdate=2025-08-24}}</ref> Internal communications revealed that Cadence China employees were explicitly instructed to refer to NUDT only in Chinese characters and use "CSCC" in English correspondence because "the subject [was] too sensitive."<ref>{{cite news|url=https://www.fenwick.com/insights/publications/doj-and-bis-flex-enforcement-priorities-as-u-s-semiconductor-design-company-agrees-to-guilty-plea-and-140m-fine|title=DOJ and BIS Flex Enforcement Priorities as U.S. Semiconductor Design Company Agrees to Guilty Plea and $140M Fine|date=2025-08-13|publisher=Fenwick & West|accessdate=2025-08-24}}</ref> The Department of Justice noted that Cadence received only partial cooperation credit because the company "failed to voluntarily disclose the misconduct" and did not fully facilitate interviews of China-based employees, ultimately resulting in the company being placed on three years of corporate probation.<ref>{{cite news|url=https://www.crowell.com/en/insights/client-alerts/joint-criminal-and-civil-export-controls-enforcement-lessons-from-the-cadence-case|title=Joint Criminal and Civil Export Controls Enforcement: Lessons from the Cadence Case|date=2025-08-20|publisher=Crowell & Moring|accessdate=2025-08-24}}</ref>

== See also ==