Single instruction, multiple data: Difference between revisions

Revision as of 16:39, 17 August 2025

Latest revision as of 22:20, 25 August 2025

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{{Short description|Type of parallel processing}}

{{Redirect|SIMD|the cryptographic hash function|SIMD (hash function)|the Scottish statistical tool|Scottish index of multiple deprivation}}

{{Update|inaccurate=yes|date=March 2017}}

{{Flynn's Taxonomy}}

{{See also|SIMD within a register|Single instruction, multiple threads}}

{{Flynn's Taxonomy}}

{{Update|inaccurate=yes|date=March 2017}}

[[File:SIMD2.svg|thumb|Single instruction, multiple data]]

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* Programming with given SIMD instruction sets can involve many low-level challenges.

*# SIMD may have restrictions on [[Data structure alignment|data alignment]]; programmers familiar with a given architecture may not expect this. Worse: the alignment may change from one revision or "compatible" processor to another.

*# Gathering data into SIMD registers and scattering it to the correct destination locations is tricky (sometimes requiring [[permute instruction]]sinstructions (operations) and can be inefficient.

*# Specific instructions like rotations or three-operand addition are not available in some SIMD instruction sets.

*# Instruction sets are architecture-specific: some processors lack SIMD instructions entirely, so programmers must provide non-vectorized implementations (or different vectorized implementations) for them.