Floating point operations per second: Difference between revisions

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| [[Giga-|giga]]FLOPS

| GFLOPS<ref>{{cite web | title = GPU GFLOPS Statistics 2007-2025: NVIDIA AMD Intel | url = https://gpus.axiomgaming.net/gflops-statistics | website = Axiom Gaming | publisher = Axiom Gaming | access-date = 14 August 2025}}</ref>

| GFLOPS

| 10⁹

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|[[Intel 80486]]

|[[x87]] (3280-bit)

| {{dunno}}

|0.128<ref name=":1" />

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*Intel [[P6 (microarchitecture)|P6]] [[Pentium Pro]]

}}

|[[x87]] (3280-bit)

| {{dunno}}

|0.5<ref name=":1">{{Cite web|title=home.iae.nl |url=http://home.iae.nl/users/mhx/flops_4.tbl|access-date=|website=}}</ref>

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*Intel [[P6 (microarchitecture)|P6]] [[Pentium II]]

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|[[MMX (instruction set)|MMXx87]] (6480-bit)

| {{dunno}}

|1<ref name=":0">{{Cite web|title=Computing Power throughout History|url=https://www.alternatewars.com/BBOW/Computing/Computing_Power.htm|access-date=2021-02-13|website=alternatewars.com}}</ref>

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|{{ublist|

|AMD [[Zen (microarchitecture)|Zen]]<br/>(Ryzen 1000 series, Threadripper 1000 series, Epyc [[Epyc|Naples]])

|AMD [[Zen+]]<ref name="tpeak_jos"/><ref>{{Cite web | url=http://www.agner.org/optimize/blog/read.php?i=838 | title=Agner's CPU blog - Test results for AMD Ryzen}}</ref><ref>https://arstechnica.com/gadgets/2017/03/amds-moment-of-zen-finally-an-architecture-that-can-compete/2/ "each core now has a pair of 128-bit FMA units of its own"</ref><ref>{{cite conference |url=https://www.hotchips.org/wp-content/uploads/hc_archives/hc28/HC28.23-Tuesday-Epub/HC28.23.90-High-Perform-Epub/HC28.23.930-X86-core-MikeClark-AMD-final_v2-28.pdf#page=7 |title=A New x86 Core Architecture for the Next Generation of Computing |author=Mike Clark |date=August 23, 2016 |publisher=AMD |conference=HotChips 28 |access-date=October 8, 2017 |archive-date=July 31, 2020 |archive-url=https://web.archive.org/web/20200731171730/https://www.hotchips.org/wp-content/uploads/hc_archives/hc28/HC28.23-Tuesday-Epub/HC28.23.90-High-Perform-Epub/HC28.23.930-X86-core-MikeClark-AMD-final_v2-28.pdf#page=7 |url-status=dead }} [https://web.archive.org/web/20161209125020/http://images.anandtech.com/doci/10591/HC28.AMD.Mike%20Clark.final-page-007.jpg page 7]</ref><br/>(Ryzen 2000 series, Threadripper 2000 series)

}}

| [[Advanced Vector Extensions|AVX2]] & [[FMA instruction set|FMA]]<br/>(128-bit, 256-bit decoding)<ref>{{Cite web |title=The microarchitecture of Intel and AMD CPUs |url=https://www.agner.org/optimize/microarchitecture.pdf}}</ref>

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|[[ENIAC]] @ 100&nbsp;kHz in 1945

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|0.00400385<ref>ENIAC @ 100&nbsp;kHz with 385 Flops {{Cite web|title=Computers of Yore|url=https://www.clear.rice.edu/comp201/08-spring/lectures/lec02/computers.shtml|access-date=2021-02-26|website=clear.rice.edu}}</ref><br/>(~{{val|32.6|e=-83|u=FLOPS|upl=W}})<ref>consumed 150 kilowatts of power {{Cite web|title=National Museum of the United States Army|url=https://www.thenmusa.org/armyinnovations/innovationeniaccomputer/|access-date=2025-08-08}}</ref>

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==Performance records==

===Single computer records===

The [[NEC SX-2]], a [[supercomputer]] developed by [[NEC]] in 1983, achieved gigaFLOPS (GFLOPS) performance with 1.3 [[billion]] FLOPS.<ref>{{Cite web |title=【NEC】 SX-1, SX-2 |url=https://museum.ipsj.or.jp/en/computer/super/0008.html |access-date=2025-08-25 |website=IPSJ Computer Museum |publisher=[[Information Processing Society of Japan]]}}</ref>

In June 1997, [[Intel]]'s [[ASCI Red]] was the world's first computer to achieve one teraFLOPS and beyond. Sandia director Bill Camp said that ASCI Red had the best reliability of any supercomputer ever built, and "was supercomputing's high-water mark in longevity, price, and performance".<ref name="jacobsequity.com">{{cite web |title=Sandia's ASCI Red, world's first teraflop supercomputer, is decommissioned |url=http://www.jacobsequity.com/ASCI%20Red%20Supercomputer.pdf |access-date=November 17, 2011 |archive-url=https://web.archive.org/web/20101105131112/http://www.jacobsequity.com/ASCI%20Red%20Supercomputer.pdf |archive-date=November 5, 2010 }}</ref>