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A '''Hardwarehardware Verificationverification Languagelanguage''', or '''HVL''', is a programming language used to verify the designs of [[electronic circuits]] written in a [[hardware description language]]. HVLs typically include features of a [[high-level programming language]] like [[C++]] or [[Java (programming language)|Java]] as well as features for easy bit-level manipulation similar to those found in [[hardware description language|HDLs]]. Many HVLs will provide constrained random stimulus generation, and functional coverage constructs to assist with complex hardware verification.
 
[[SystemVerilog]], [[OpenVera]], [[e (verification language)|e]], and [[SystemC]] are the most commonly used HVLs.<ref>[http://theasicguy.com/2009/02/03/verification-methodology-poll/ The ASIC Guy Verification Poll]</ref><ref>[http://theasicguy.com/2009/01/27/dvcon-survey-results-what-do-they-mean/ DVCon Language Poll]</ref> [[SystemVerilog]] attempts to combine HDL and HVL constructs into a single standard.
 
==See also==
*[[e (verification language)|e]]<ref>{{Cite book |last1=Iman |first1=Sasan |title=The e Hardware Verification Language (Information Technology: Transmission, Processing & Storage) |last2=Joshi |first2=Sunita |date=May 8, 2007 |publisher=Springer |isbn=978-1402080234}}</ref>
*[[OpenVera]]
*[[SystemC]]<ref>{{Cite web |title=systemc.org |url=https://systemc.org/ |access-date=2024-09-10 |website=systemc.org}}</ref>
*[[e (verification language)|e]]
*[[SystemVerilog]]<ref>{{Cite book |last=IEEE |date=February 22, 2018 |title=1800-2017 - IEEE Standard for SystemVerilog--Unified Hardware Design, Specification, and Verification Language |doi=10.1109/IEEESTD.2018.8299595 |isbn=978-1-5044-4509-2 }}</ref>
*[[SystemC]]
*[[Property Specification Language]]<ref>{{Cite book |last=IEEE |date=2005 |title=1850-2005 –IEEE Standard for Property Specification Language (PSL) |doi=10.1109/IEEESTD.2005.97780 |isbn=0-7381-4780-X}}</ref>
*[[SystemVerilog]]
*[[Python with cocotb]]<ref>{{Cite web |title=cocotb |url=https://www.cocotb.org/ |access-date=2024-09-10 |website=cocotb |language=en}}</ref>
*[[Property Specification Language]]
*[[Scala with ChiselTest]]<ref>{{Cite web |title=chiseltest |url=https://index.scala-lang.org/ucb-bar/chiseltest}}</ref>
 
== References ==
{{reflist}}
 
== External links ==
Think Verification: http://www.thinkverification.com/
 
{{DEFAULTSORT:Hardware Verification Language}}