System bus model: Difference between revisions

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first draft. still need to add references and finish article.
 
redirecting boldly per WP:BRD. yes this is at DrV, but that doesn't stop a redirect AFAIK.
 
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#REDIRECT [[System bus]]
{{inuse}}
The '''System bus model'' is a streamlined version of the [[Von Neumann architecture|Von Neumann model]] of computer architecture. The System bus models divides the computer into three individual subunits whoch are the CPU, memory and Input/Output. THe system bus model deviates from the von Neumann model by combining the [[Arithmetic logic unit]](ALU) and the [[Central processing unit]](CPU) into a single unit.
==Communications==
A key feature of the System bus model is