Template:User verilog-1: Difference between revisions

Revision as of 20:11, 28 August 2009

Latest revision as of 09:21, 19 October 2012

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| id-s = 10

| info = This user is a '''[[:Category:User verilog-1|beginning]] [[Verilog]]''' chip designer.

| usercategory = User verilog -1

| nocat = {{{nocat|}}}

| usercategory2 = User verilog-1

}}<noinclude>

}}

{{complang|verilog|verilog}}

[[Category:Computer language user templates|verilog-1]]

</noinclude>