Template:User verilog-1: Difference between revisions

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Created, based on vhdl-1.
 
Hyacinth (talk | contribs)
-supercat
 
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{{userbox-level
<div style="float: left; border: solid #C0C8FF 1px; margin: 1px;">
| level = 1
{| cellspacing="0" style="width: 238px; background: #F0F8FF;"
| id = verilog
| style="width: 45px; height: 45px; background: #C0C8FF; text-align: center; font-size: 10pt" | '''verilog-1'''
| id-s = 10
| style="font-size:info 8pt; padding: 4pt; line-height: 1.25em;" |= This user is a '''[[:Category:User verilog-1|beginning]] [[Verilog]]''' chip designer.
|}</div>
| usercategory = User verilog-1
[[Category:User verilog |{{PAGENAME}}]][[Category:User verilog-1|{{PAGENAME}}]]
| nocat = {{{nocat|}}}
}}<noinclude>
{{complang|verilog|verilog}}
[[Category:Computer language user templates|verilog-1]]
</noinclude>