Property Specification Language: Difference between revisions

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Line 1: {{Short description\|Temporal logic}} '''Property Specification Language''' ('''PSL''') is a [[temporal logic]] extending [[linear temporal logic]] with a range of operators for both ease of expression and enhancement of expressive power. PSL makes an extensive use of [[regular expressions]] and syntactic sugaring. It is widely used in the hardware design and verification industry, where [[formal verification]] tools (such as [[model checking]]) and/or [[logic simulation]] tools are used to prove or refute that a given PSL formula holds on a given design. Line 259 ⟶ 260: ==External links== * [http://www.eda.org/ieee-1850 IEEE 1850 working group] * [https://web.archive.org/web/20051210035642/http://standards.ieee.org/announcements/pr_1850psl.html IEEE Announcement September 2005] * [http://www.accellera.org/ Accellera] * [http://www.project-veripage.com/psl_tutorial_1.php Property Specification Language Tutorial]