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'''Fair computational tree logic''' is conventional [[computational tree logic]] studied with explicit fairness constraints.
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==References==
* {{cite journal |author1=Emerson, E. A. |author2=Halpern, J. Y. |author2link = Joseph Halpern| title=Decision procedures and expressiveness in the temporal logic of branching time | journal=Journal of Computer and System Sciences| year=1985| volume=30 | issue=1 | pages=1–24 | doi=10.1016/0022-0000(85)90001-7| doi-access=free}}
* {{cite journal |author1=Clarke, E. M. |author1link = Edmund M. Clarke|author2=Emerson, E. A. |author3= Sistla, A. P. |name-list-style=amp | title=Automatic verification of finite-state concurrent systems using temporal logic specifications | journal=ACM Transactions on Programming Languages and Systems| year=1986| volume=8 | issue=2 | pages=244–263 | doi=10.1145/5397.5399| s2cid=52853200 | doi-access=free }}
[[Category:Temporal logic]]
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