Inter-processor interrupt: Difference between revisions

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In [[computing]], an '''inter-processor interrupt''' ('''IPI'''), also known as a ''shoulder tap'', is a special type of [[interrupt]] by which one [[Processor (computing)|processor]] may interrupt another processor in a [[multiprocessor]] system if the interrupting processor requires action from the other processor. Actions that might be requested include:

* flushes ofFlush [[memory management unit]] caches, such as [[translation lookaside buffer]]s, on other processors when memory mappings are changed by one processor;

* stoppingStop when the system is being shut down by one processor.

* Notify an alternate CPU of a malfunction for Alternate CPU Recovery (ACR).

* Notify a processor that higher -priority work is available.

* Notify a processor of work that cannot be done on all processors due to, e.g.,

** asymmetric access to [[I/O channel]]s<ref>{{cite manual

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** special features on some processors<ref>{{Cite web |title=AMD Technical Information Portal |url=https://docs.amd.com/r/en-US/am011-versal-acap-trm/Inter-Processor-Interrupts |access-date=2024-07-18 |website=docs.amd.com}}</ref>

** special features on some processors

== Mechanism ==

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== Examples ==

In a multiprocessor system running [[Microsoft Windows]], a processor may interrupt another processor for the following reasons, in addition to the ones listed above:<ref>{{Cite web |title=Inter Processor Interrupt usage |url=https://stackoverflow.com/questions/15091165/inter-processor-interrupt-usage |access-date=2024-07-18 |website=Stack Overflow |language=en}}</ref>

# queue a DISPATCH_LEVEL interrupt to schedule a particular thread for execution;

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|author = Matt

|title = Understanding IRQL

|url = httphttps://ext2fsd.sourceforge.net/documents/irql.htm

|accessdate = 2014-12-06

|date = 2002-04-28

|archive-date = 2019-10-14

}}</ref>

|archive-url = https://web.archive.org/web/20191014125625/http://ext2fsd.sourceforge.net/documents/irql.htm

|url-status = dead

}}</ref>

==See also==