Non-volatile random-access memory: Difference between revisions

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{{See also|Nonvolatile BIOS memory}}
{{Memory types}}
[[File:DS1225.JPG | thumb | right | Non-volatile RAM takes various form factors including this tall IC with pins for a socket or soldering beneath.]]
'''Non-volatile random-access memory''' ('''NVRAM''') is [[random-access memory]] that retains data without applied power. This is in contrast to [[dynamic random-access memory]] (DRAM) and [[static random-access memory]] (SRAM), which both maintain data only for as long as power is applied, or forms of [[Sequential access memory|sequential-access memory]] such as [[magnetic tape]], which cannot be randomly accessed but which retains data indefinitely without electric power.
 
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==Early NVRAMs==
 
Some early computers used [[Drum memory|magnetic drum]] which was non-volatile as a byproduct of its construction. The industry moved to [[magnetic-core memory]] in the later 1950s, which stored data in the polarity of small magnets. Since the magnets held their state even with the power removed, core memory was also non-volatile. Other memory types required constant power to retain data, such as [[vacuum tube]] or solid-state [[Flip-flop (electronics)|flip-flop]]s, [[Williams tube]], and semiconductor memory (static or dynamic RAM).
 
Advances in [[semiconductor fabrication]] in the 1970s led to a new generation of [[Solid state (electronics)|solid state]] memories that magnetic-core memory could not match on cost or density. Today dynamic RAM forms the vast majority of a typical computer's [[main memory]]. Many systems require at least some non-volatile memory. Desktop computers require permanent storage of the instructions required to load the operating system. Embedded systems, such as an engine control computer for a car, must retain their instructions when power is removed. Many systems used a combination of RAM and some form of ROM for these roles.
 
Custom [[Read-only memory|ROM]] integrated circuits were one solution. The memory contents were stored as a pattern of the last mask used for manufacturing the integrated circuit, and so could not be modified once completed.
 
[[Programmable read-only memory|PROM]] improved on this design, allowing the chip to be written electrically by the end-user. PROM consists of a series of diodes that are initially all set to a single value, 1 for instance. By applying higher power than normal, a selected diode can be ''burned out'' (like a [[Fuse (electrical)|fuse]]), thereby permanently setting that bit to 0. PROM facilitated prototyping and small-volume manufacturing. Many semiconductor manufacturers provided a PROM version of their mask ROM part so that development [[firmware]] could be tested before ordering a mask ROM.
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An improvement on EPROM, [[EEPROM]], soon followed. The extra E stands for ''electrically'', referring to the ability to reset EEPROM using electricity instead of UV, making the devices much easier to use in practice. The bits are re-set with the application of even higher power through the other terminals of the transistor (''source'' and ''drain''). This high-power pulse, in effect, sucks the electrons through the insulator, returning it to the ground state. This process has the disadvantage of mechanically degrading the chip, however, so memory systems based on floating-gate transistors in general have short write-lifetimes, on the order of 10<sup>5</sup> writes to any particular bit.
 
One approach to overcoming the rewrite count limitation is to have a standard [[ShadowStatic Randomrandom-access Access Memorymemory|SRAM]] where each bit is backed up by an EEPROM bit. In normal operation the chip functions as a fast SRAM and in case of power failure the content is quickly transferred to the EEPROM part, from where it gets loaded back at the next power up. Such chips were called '''NOVRAM'''s<!-- linked here by redirect [[NOVRAM]] --><ref>{{cite web|url=http://www.intersil.com/data/an/AN1146.pdf|title=X4C105 NOVRAM Features and Applications|first=Peter|last=Chan|date=2005-04-21|website=Intersil|archive-url=https://web.archive.org/web/20070614111904/http://www.intersil.com/data/an/AN1146.pdf|archive-date=2007-06-14}}</ref> by their manufacturers.
 
The basis of [[flash memory]] is identical to EEPROM and differs largely in internal layout. Flash allows its memory to be written only in blocks, which greatly simplifies the internal wiring and allows for higher densities. [[Memory storage density]] is the main determinant of cost in most computer memory systems, and due to this flash has evolved into one of the lowest-cost solid-state memory devices available. Starting around 2000, demand for ever-greater quantities of flash have driven manufacturers to use only the latest fabrication systems in order to increase density as much as possible. Although fabrication limits are starting to come into play, new [[Multi-level cell|"multi-bit" techniques]] appear to be able to double or quadruple the density even at existing line widths.
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===Millipede memory===
{{Main|Millipede memory}}
Perhaps one of the more innovative solutions is [[IBM Millipede|millipede memory]], developed by [[IBM]]. Millipede is, in essence, a [[punched card]] rendered using [[nanotechnology]] in order to dramatically increase areal density. Although it was planned to introduce Millipede as early as 2003, unexpected problems in development delayed this until 2005, by which point it was no longer competitive with flash. In theory the technology offers storage densities on the order of 1 Tbit/in<sup>2</sup> (≈155 Gbit/cm<sup>2</sup>), greater than even the best [[hard drive]] technologies currently in use ([[perpendicular recording]] offers 636 Gbit/in<sup>2</sup> (≈98.6 Gbit/cm<sup>2</sup>) as of Dec. 2011<ref name=636-gigabits>{{cite press release | url = http://www.hitachigst.com/press-room/2011/hitachi-gst-ships-one-terabyte-per-platter-hard-drives | title = Hitachi GST Ships One Terabyte Per Platter Hard Drives | access-date = 2011-12-17 | date = 2011-08-03 | publisher = [[Hitachi Global Storage Technologies]] | url-status = dead | archive-url = https://web.archive.org/web/20111026210519/http://www.hitachigst.com/press-room/2011/hitachi-gst-ships-one-terabyte-per-platter-hard-drives | archive-date = 2011-10-26}}</ref>), but future [[heat-assisted magnetic recording]] and [[patterned media]] together could support densities of 10 Tbit/in<sup>2</sup><ref name=10-terabits>{{cite web | url = https://arstechnica.com/science/news/2010/05/new-hard-drive-write-method-packs-in-one-terabyte-per-inch.ars | title = New hard drive write method packs in one terabit per inch | access-date = 2011-12-17 | last = Johnston | first = Casey | date = 2011-05-07 | website = Ars Technica}}</ref> (≈1.55 Tbit/cm<sup>2</sup>). However, slow read and write times for memories this large seem to limit this technology to hard drive replacements as opposed to high-speed RAM-like uses, although to a very large degree the same is true of flash as well.
 
===FeFET memory===